Go to the documentation of this file. 6 #define ORCA_MEMORY_BASE_1 0x50000000 7 #define ORCA_MEMORY_SIZE_1 0x00000080 8 #define ORCA_MEMORY_BASE_2 0x50000080 9 #define ORCA_MEMORY_SIZE_2 0x00000080 12 #define SIGNAL_CPU_STALL 0x40410000 13 #define SIGNAL_CPU_INTR 0x40410001 14 #define SIGNAL_SEND_STATUS 0x40410002 16 #define SIGNAL_RECV_STATUS 0x40410004 20 #define SIGNAL_PROG_SEND 0x40410008 21 #define SIGNAL_PROG_RECV 0x40410009 24 #define SIGNAL_PROG_ADDR 0x4041000C 25 #define SIGNAL_PROG_SIZE 0x40410010 28 #define MAGIC_TILE_ID 0x40411000 31 #ifdef MEMORY_ENABLE_COUNTERS 32 #define M0_COUNTER_STORE_ADDR (0x40411010) 33 #define M0_COUNTER_LOAD_ADDR (0x40411014) 34 #define M1_COUNTER_STORE_ADDR (0x40411018) 35 #define M1_COUNTER_LOAD_ADDR (0x4041101C) 36 #define M2_COUNTER_STORE_ADDR (0x40411020) 37 #define M2_COUNTER_LOAD_ADDR (0x40411024) 40 #ifdef HFRISCV_ENABLE_COUNTERS 41 #define CPU_COUNTER_ARITH_ADDR (0x40411128) 42 #define CPU_COUNTER_LOGICAL_ADDR (0x4041112C) 43 #define CPU_COUNTER_SHIFT_ADDR (0x40411130) 44 #define CPU_COUNTER_BRANCHES_ADDR (0x40411134) 45 #define CPU_COUNTER_JUMPS_ADDR (0x40411138) 46 #define CPU_COUNTER_LOADSTORE_ADDR (0x4041113C) 47 #define CPU_COUNTER_HOSTTIME_ADDR (0x40411140) 48 #define CPU_COUNTER_CYCLES_TOTAL_ADDR (0x40411144) 49 #define CPU_COUNTER_CYCLES_STALL_ADDR (0x40411148) 53 #ifdef ROUTER_ENABLE_COUNTERS 54 #define ROUTER_COUNTER_ACTIVE_ADDR (0x40411500)