orca-sim
_MemoryMap.h
Go to the documentation of this file.
1 /******************************************************************************
2  * This file is part of project ORCA. More information on the project
3  * can be found at the following repositories at GitHub's website.
4  *
5  * http://https://github.com/andersondomingues/orca-sim
6  * http://https://github.com/andersondomingues/orca-software
7  * http://https://github.com/andersondomingues/orca-mpsoc
8  * http://https://github.com/andersondomingues/orca-tools
9  *
10  * Copyright (C) 2018-2020 Anderson Domingues, <ti.andersondomingues@gmail.com>
11  *
12  * This program is free software; you can redistribute it and/or modify
13  * it under the terms of the GNU General Public License as published by
14  * the Free Software Foundation; either version 2 of the License, or
15  * (at your option) any later version.
16  *
17  * This program is distributed in the hope that it will be useful,
18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20  * GNU General Public License for more details.
21  *
22  * You should have received a copy of the GNU General Public License along
23  * with this program; if not, write to the Free Software Foundation, Inc.,
24  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
25 ******************************************************************************/
26 #ifndef PLATFORMS_SINGLE_CORE_NN_INCLUDE_MEMORYMAP_H_
27 #define PLATFORMS_SINGLE_CORE_NN_INCLUDE_MEMORYMAP_H_
28 
29 #define SIGNAL_CPU_STALL 0x40412000 // 8 bits
30 #define SIGNAL_CPU_INTR 0x40412001
31 #define SIGNAL_DMA_PROG 0x40412002
32 // 0x4041003
33 #define DMA_BURST_SIZE 0x40412004 // 32 bits
34 #define DMA_NN_SIZE 0x40412008
35 #define DMA_OUT_SIZE 0x4041200C
36 #define DMA_MAC_OUT_ARRAY 0x40412010
37 // DMA_MAC_OUT_ARRAY0 0x40412010
38 // DMA_MAC_OUT_ARRAY1 0x40412014
39 // ...
40 // DMA_MAC_OUT_ARRAY31 0x40412010 + (0x20 * 4) -1
41 
42 #define DMA_BURST_SIZE 0x40412004 // 32 bits
43 #define DMA_NN_SIZE 0x40412008
44 #define DMA_OUT_SIZE 0x4041200C
45 #define DMA_MAC_OUT_ARRAY 0x40412010
46 // DMA_MAC_OUT_ARRAY0 0x40412010
47 // DMA_MAC_OUT_ARRAY1 0x40412014
48 //...
49 // DMA_MAC_OUT_ARRAY31 0x40412010 + (0x20 * 4) -1
50 
51 // 0x40411xxx => memory mapped counters
52 #ifdef MEMORY_ENABLE_COUNTERS
53 #define M0_COUNTER_STORE_ADDR (0x40411010)
54 #define M0_COUNTER_LOAD_ADDR (0x40411014)
55 #define M1_COUNTER_STORE_ADDR (0x40411018)
56 #define M1_COUNTER_LOAD_ADDR (0x4041101C)
57 #define M2_COUNTER_STORE_ADDR (0x40411020)
58 #define M2_COUNTER_LOAD_ADDR (0x40411024)
59 #endif
60 
61 #ifdef HFRISCV_ENABLE_COUNTERS
62 #define CPU_COUNTER_ARITH_ADDR (0x40411128)
63 #define CPU_COUNTER_LOGICAL_ADDR (0x4041112C)
64 #define CPU_COUNTER_SHIFT_ADDR (0x40411130)
65 #define CPU_COUNTER_BRANCHES_ADDR (0x40411134)
66 #define CPU_COUNTER_JUMPS_ADDR (0x40411138)
67 #define CPU_COUNTER_LOADSTORE_ADDR (0x4041113C)
68 #define CPU_COUNTER_HOSTTIME_ADDR (0x40411140)
69 #define CPU_COUNTER_CYCLES_TOTAL_ADDR (0x40411144)
70 #define CPU_COUNTER_CYCLES_STALL_ADDR (0x40411148)
71 #endif
72 
73 // 0x403F15xx => router wires
74 #ifdef ROUTER_ENABLE_COUNTERS
75 #define ROUTER_COUNTER_ACTIVE_ADDR (0x40411500)
76 #endif
77 
78 // NN memory configuration. TOTAL_NN_MEM_SIZE and SIMD_SIZE can be changed
79 // in design time
80 #define TOTAL_NN_MEM_SIZE 4 * 1024 * 1024
81 #define SIMD_SIZE 32
82 #define NN_MEM_SIZE_PER_CHANNEL (TOTAL_NN_MEM_SIZE / 2) / SIMD_SIZE
83 #define MEMW_BASE 0x40500000
84 #define MEMI_BASE MEMW_BASE + (TOTAL_NN_MEM_SIZE/2)
85 
86 #endif // PLATFORMS_SINGLE_CORE_NN_INCLUDE_MEMORYMAP_H_
Generated by   doxygen 1.8.12