Enable or disable the High Speed APB (APB2) peripheral clock. More...
Collaboration diagram for APB2 Clock Enable Disable:
|
Macros | |
| #define | __HAL_RCC_AFIO_CLK_ENABLE() |
| #define | __HAL_RCC_GPIOA_CLK_ENABLE() |
| #define | __HAL_RCC_GPIOB_CLK_ENABLE() |
| #define | __HAL_RCC_GPIOC_CLK_ENABLE() |
| #define | __HAL_RCC_GPIOD_CLK_ENABLE() |
| #define | __HAL_RCC_ADC1_CLK_ENABLE() |
| #define | __HAL_RCC_TIM1_CLK_ENABLE() |
| #define | __HAL_RCC_SPI1_CLK_ENABLE() |
| #define | __HAL_RCC_USART1_CLK_ENABLE() |
| #define | __HAL_RCC_AFIO_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_AFIOEN)) |
| #define | __HAL_RCC_GPIOA_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_IOPAEN)) |
| #define | __HAL_RCC_GPIOB_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_IOPBEN)) |
| #define | __HAL_RCC_GPIOC_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_IOPCEN)) |
| #define | __HAL_RCC_GPIOD_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_IOPDEN)) |
| #define | __HAL_RCC_ADC1_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_ADC1EN)) |
| #define | __HAL_RCC_TIM1_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_TIM1EN)) |
| #define | __HAL_RCC_SPI1_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_SPI1EN)) |
| #define | __HAL_RCC_USART1_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_USART1EN)) |
Detailed Description
Enable or disable the High Speed APB (APB2) peripheral clock.
- Note
- After reset, the peripheral clock (used for registers read/write access) is disabled and the application software has to enable this clock before using it.
Macro Definition Documentation
◆ __HAL_RCC_ADC1_CLK_ENABLE
| #define __HAL_RCC_ADC1_CLK_ENABLE | ( | ) |
Value:
do { \
__IO uint32_t tmpreg; \
SET_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC1EN);\
/* Delay after an RCC peripheral clock enabling */\
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_ADC1EN);\
UNUSED(tmpreg); \
} while(0U)
◆ __HAL_RCC_AFIO_CLK_ENABLE
| #define __HAL_RCC_AFIO_CLK_ENABLE | ( | ) |
Value:
do { \
__IO uint32_t tmpreg; \
SET_BIT(RCC->APB2ENR, RCC_APB2ENR_AFIOEN);\
/* Delay after an RCC peripheral clock enabling */\
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_AFIOEN);\
UNUSED(tmpreg); \
} while(0U)
◆ __HAL_RCC_GPIOA_CLK_ENABLE
| #define __HAL_RCC_GPIOA_CLK_ENABLE | ( | ) |
Value:
do { \
__IO uint32_t tmpreg; \
SET_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPAEN);\
/* Delay after an RCC peripheral clock enabling */\
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPAEN);\
UNUSED(tmpreg); \
} while(0U)
◆ __HAL_RCC_GPIOB_CLK_ENABLE
| #define __HAL_RCC_GPIOB_CLK_ENABLE | ( | ) |
Value:
do { \
__IO uint32_t tmpreg; \
SET_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPBEN);\
/* Delay after an RCC peripheral clock enabling */\
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPBEN);\
UNUSED(tmpreg); \
} while(0U)
◆ __HAL_RCC_GPIOC_CLK_ENABLE
| #define __HAL_RCC_GPIOC_CLK_ENABLE | ( | ) |
Value:
do { \
__IO uint32_t tmpreg; \
SET_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPCEN);\
/* Delay after an RCC peripheral clock enabling */\
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPCEN);\
UNUSED(tmpreg); \
} while(0U)
◆ __HAL_RCC_GPIOD_CLK_ENABLE
| #define __HAL_RCC_GPIOD_CLK_ENABLE | ( | ) |
Value:
do { \
__IO uint32_t tmpreg; \
SET_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);\
/* Delay after an RCC peripheral clock enabling */\
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);\
UNUSED(tmpreg); \
} while(0U)
◆ __HAL_RCC_SPI1_CLK_ENABLE
| #define __HAL_RCC_SPI1_CLK_ENABLE | ( | ) |
Value:
do { \
__IO uint32_t tmpreg; \
SET_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN);\
/* Delay after an RCC peripheral clock enabling */\
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_SPI1EN);\
UNUSED(tmpreg); \
} while(0U)
◆ __HAL_RCC_TIM1_CLK_ENABLE
| #define __HAL_RCC_TIM1_CLK_ENABLE | ( | ) |
Value:
do { \
__IO uint32_t tmpreg; \
SET_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN);\
/* Delay after an RCC peripheral clock enabling */\
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_TIM1EN);\
UNUSED(tmpreg); \
} while(0U)
◆ __HAL_RCC_USART1_CLK_ENABLE
| #define __HAL_RCC_USART1_CLK_ENABLE | ( | ) |
Value:
do { \
__IO uint32_t tmpreg; \
SET_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
/* Delay after an RCC peripheral clock enabling */\
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_USART1EN);\
UNUSED(tmpreg); \
} while(0U)
