21 #ifndef __STM32F1xx_HAL_DMA_H 22 #define __STM32F1xx_HAL_DMA_H 151 #define HAL_DMA_ERROR_NONE 0x00000000U 152 #define HAL_DMA_ERROR_TE 0x00000001U 153 #define HAL_DMA_ERROR_NO_XFER 0x00000004U 154 #define HAL_DMA_ERROR_TIMEOUT 0x00000020U 155 #define HAL_DMA_ERROR_NOT_SUPPORTED 0x00000100U 163 #define DMA_PERIPH_TO_MEMORY 0x00000000U 164 #define DMA_MEMORY_TO_PERIPH ((uint32_t)DMA_CCR_DIR) 165 #define DMA_MEMORY_TO_MEMORY ((uint32_t)DMA_CCR_MEM2MEM) 174 #define DMA_PINC_ENABLE ((uint32_t)DMA_CCR_PINC) 175 #define DMA_PINC_DISABLE 0x00000000U 183 #define DMA_MINC_ENABLE ((uint32_t)DMA_CCR_MINC) 184 #define DMA_MINC_DISABLE 0x00000000U 192 #define DMA_PDATAALIGN_BYTE 0x00000000U 193 #define DMA_PDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_PSIZE_0) 194 #define DMA_PDATAALIGN_WORD ((uint32_t)DMA_CCR_PSIZE_1) 202 #define DMA_MDATAALIGN_BYTE 0x00000000U 203 #define DMA_MDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_MSIZE_0) 204 #define DMA_MDATAALIGN_WORD ((uint32_t)DMA_CCR_MSIZE_1) 212 #define DMA_NORMAL 0x00000000U 213 #define DMA_CIRCULAR ((uint32_t)DMA_CCR_CIRC) 221 #define DMA_PRIORITY_LOW 0x00000000U 222 #define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_CCR_PL_0) 223 #define DMA_PRIORITY_HIGH ((uint32_t)DMA_CCR_PL_1) 224 #define DMA_PRIORITY_VERY_HIGH ((uint32_t)DMA_CCR_PL) 233 #define DMA_IT_TC ((uint32_t)DMA_CCR_TCIE) 234 #define DMA_IT_HT ((uint32_t)DMA_CCR_HTIE) 235 #define DMA_IT_TE ((uint32_t)DMA_CCR_TEIE) 243 #define DMA_FLAG_GL1 0x00000001U 244 #define DMA_FLAG_TC1 0x00000002U 245 #define DMA_FLAG_HT1 0x00000004U 246 #define DMA_FLAG_TE1 0x00000008U 247 #define DMA_FLAG_GL2 0x00000010U 248 #define DMA_FLAG_TC2 0x00000020U 249 #define DMA_FLAG_HT2 0x00000040U 250 #define DMA_FLAG_TE2 0x00000080U 251 #define DMA_FLAG_GL3 0x00000100U 252 #define DMA_FLAG_TC3 0x00000200U 253 #define DMA_FLAG_HT3 0x00000400U 254 #define DMA_FLAG_TE3 0x00000800U 255 #define DMA_FLAG_GL4 0x00001000U 256 #define DMA_FLAG_TC4 0x00002000U 257 #define DMA_FLAG_HT4 0x00004000U 258 #define DMA_FLAG_TE4 0x00008000U 259 #define DMA_FLAG_GL5 0x00010000U 260 #define DMA_FLAG_TC5 0x00020000U 261 #define DMA_FLAG_HT5 0x00040000U 262 #define DMA_FLAG_TE5 0x00080000U 263 #define DMA_FLAG_GL6 0x00100000U 264 #define DMA_FLAG_TC6 0x00200000U 265 #define DMA_FLAG_HT6 0x00400000U 266 #define DMA_FLAG_TE6 0x00800000U 267 #define DMA_FLAG_GL7 0x01000000U 268 #define DMA_FLAG_TC7 0x02000000U 269 #define DMA_FLAG_HT7 0x04000000U 270 #define DMA_FLAG_TE7 0x08000000U 289 #define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET) 296 #define __HAL_DMA_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CCR, DMA_CCR_EN)) 303 #define __HAL_DMA_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CCR, DMA_CCR_EN)) 318 #define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) (SET_BIT((__HANDLE__)->Instance->CCR, (__INTERRUPT__))) 330 #define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CCR , (__INTERRUPT__))) 342 #define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CCR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) 349 #define __HAL_DMA_GET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->CNDTR) 409 #define IS_DMA_DIRECTION(DIRECTION) (((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \ 410 ((DIRECTION) == DMA_MEMORY_TO_PERIPH) || \ 411 ((DIRECTION) == DMA_MEMORY_TO_MEMORY)) 413 #define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1U) && ((SIZE) < 0x10000U)) 415 #define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \ 416 ((STATE) == DMA_PINC_DISABLE)) 418 #define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE) || \ 419 ((STATE) == DMA_MINC_DISABLE)) 421 #define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PDATAALIGN_BYTE) || \ 422 ((SIZE) == DMA_PDATAALIGN_HALFWORD) || \ 423 ((SIZE) == DMA_PDATAALIGN_WORD)) 425 #define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MDATAALIGN_BYTE) || \ 426 ((SIZE) == DMA_MDATAALIGN_HALFWORD) || \ 427 ((SIZE) == DMA_MDATAALIGN_WORD )) 429 #define IS_DMA_MODE(MODE) (((MODE) == DMA_NORMAL ) || \ 430 ((MODE) == DMA_CIRCULAR)) 432 #define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_PRIORITY_LOW ) || \ 433 ((PRIORITY) == DMA_PRIORITY_MEDIUM) || \ 434 ((PRIORITY) == DMA_PRIORITY_HIGH) || \ 435 ((PRIORITY) == DMA_PRIORITY_VERY_HIGH)) This file contains HAL common defines, enumeration, macros and structures definitions.
Definition: stm32f1xx_hal_dma.h:100
HAL_DMA_LevelCompleteTypeDef
HAL DMA Error Code structure definition.
Definition: stm32f1xx_hal_dma.h:89
void(* XferAbortCallback)(struct __DMA_HandleTypeDef *hdma)
Definition: stm32f1xx_hal_dma.h:129
DMA Configuration Structure definition.
Definition: stm32f1xx_hal_dma.h:48
Definition: stm32f1xx_hal_dma.h:82
DMA handle Structure definition.
Definition: stm32f1xx_hal_dma.h:111
void * Parent
Definition: stm32f1xx_hal_dma.h:121
void(* XferCpltCallback)(struct __DMA_HandleTypeDef *hdma)
Definition: stm32f1xx_hal_dma.h:123
Definition: stm32f1xx_hal_dma.h:103
HAL_DMA_StateTypeDef State
Definition: stm32f1xx_hal_dma.h:119
__IO uint32_t ErrorCode
Definition: stm32f1xx_hal_dma.h:131
DMA_Channel_TypeDef * Instance
Definition: stm32f1xx_hal_dma.h:113
void(* XferErrorCallback)(struct __DMA_HandleTypeDef *hdma)
Definition: stm32f1xx_hal_dma.h:127
void(* XferHalfCpltCallback)(struct __DMA_HandleTypeDef *hdma)
Definition: stm32f1xx_hal_dma.h:125
Definition: stm32f1xx_hal_dma.h:102
uint32_t PeriphDataAlignment
Definition: stm32f1xx_hal_dma.h:60
DMA_InitTypeDef Init
Definition: stm32f1xx_hal_dma.h:115
DMA_TypeDef * DmaBaseAddress
Definition: stm32f1xx_hal_dma.h:133
HAL_LockTypeDef Lock
Definition: stm32f1xx_hal_dma.h:117
uint32_t MemDataAlignment
Definition: stm32f1xx_hal_dma.h:63
Header file of DMA HAL extension module.
uint32_t ChannelIndex
Definition: stm32f1xx_hal_dma.h:135
Definition: stm32f1xx_hal_dma.h:91
#define __IO
Definition: core_armv8mbl.h:196
Definition: stm32f1xx_hal_dma.h:80
HAL_DMA_CallbackIDTypeDef
HAL DMA Callback ID structure definition.
Definition: stm32f1xx_hal_dma.h:98
struct __DMA_HandleTypeDef DMA_HandleTypeDef
DMA handle Structure definition.
uint32_t Mode
Definition: stm32f1xx_hal_dma.h:66
HAL_LockTypeDef
HAL Lock structures definition.
Definition: stm32f1xx_hal_def.h:50
Definition: stm32f1xx_hal_dma.h:104
uint32_t Priority
Definition: stm32f1xx_hal_dma.h:71
Definition: stm32f103xb.h:299
uint32_t Direction
Definition: stm32f1xx_hal_dma.h:50
DMA Controller.
Definition: stm32f103xb.h:291
Definition: stm32f1xx_hal_dma.h:101
uint32_t MemInc
Definition: stm32f1xx_hal_dma.h:57
Definition: stm32f1xx_hal_dma.h:81
HAL_StatusTypeDef
HAL Status structures definition.
Definition: stm32f1xx_hal_def.h:39
uint32_t PeriphInc
Definition: stm32f1xx_hal_dma.h:54
Definition: stm32f1xx_hal_dma.h:83
HAL_DMA_StateTypeDef
HAL DMA State structures definition.
Definition: stm32f1xx_hal_dma.h:78
Definition: stm32f1xx_hal_dma.h:92