plibsys
pmacroscpu.h
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1 /*
2  * The MIT License
3  *
4  * Copyright (C) 2017 Alexander Saprykin <saprykin.spb@gmail.com>
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining
7  * a copy of this software and associated documentation files (the
8  * 'Software'), to deal in the Software without restriction, including
9  * without limitation the rights to use, copy, modify, merge, publish,
10  * distribute, sublicense, and/or sell copies of the Software, and to
11  * permit persons to whom the Software is furnished to do so, subject to
12  * the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be
15  * included in all copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED 'AS IS', WITHOUT WARRANTY OF ANY KIND,
18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20  * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
21  * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
22  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
23  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24  */
25 
39 #if !defined (PLIBSYS_H_INSIDE) && !defined (PLIBSYS_COMPILATION)
40 # error "Header files shouldn't be included directly, consider using <plibsys.h> instead."
41 #endif
42 
43 #ifndef PLIBSYS_HEADER_PMACROSCPU_H
44 #define PLIBSYS_HEADER_PMACROSCPU_H
45 
46 /*
47  * List of supported CPU architectures (P_CPU_x):
48  *
49  * ALPHA - Alpha
50  * ARM - ARM architecture revision:
51  * v2, v3, v4, v5, v6, v7, v8
52  * ARM_32 - ARM 32-bit
53  * ARM_64 - ARM 64-bit
54  * ARM_V2 - ARMv2 instruction set
55  * ARM_V3 - ARMv3 instruction set
56  * ARM_V4 - ARMv4 instruction set
57  * ARM_V5 - ARMv5 instruction set
58  * ARM_V6 - ARMv6 instruction set
59  * ARM_V7 - ARMv7 instruction set
60  * ARM_V8 - ARMv8 instruction set
61  * X86 - x86 architecture revision:
62  * 3, 4, 5, 6 (Intel P6 or better)
63  * X86_32 - x86 32-bit
64  * X86_64 - x86 64-bit
65  * IA64 - Intel Itanium (IA-64)
66  * MIPS - MIPS
67  * MIPS_I - MIPS I
68  * MIPS_II - MIPS II
69  * MIPS_III - MIPS III
70  * MIPS_IV - MIPS IV
71  * MIPS_32 - MIPS32
72  * MIPS_64 - MIPS64
73  * POWER - PowerPC
74  * POWER_32 - PowerPC 32-bit
75  * POWER_64 - PowerPC 64-bit
76  * SPARC - Sparc
77  * SPARC_V8 - Sparc V8
78  * SPARC_V9 - Sparc V9
79  * HPPA - HPPA-RISC
80  * HPPA_32 - HPPA-RISC 32-bit
81  * HPPA_64 - HPPA-RISC 64-bit
82  */
83 
364 #if defined(__alpha__) || defined(__alpha) || defined(_M_ALPHA)
365 # define P_CPU_ALPHA
366 #elif defined(__arm__) || defined(__TARGET_ARCH_ARM) || defined(_ARM) || \
367  defined(_M_ARM) || defined(_M_ARM_64) || defined(__arm) || defined(__aarch64__) || \
368  defined(__ARM64__)
369 # if defined(__aarch64__) || defined(_M_ARM64) || defined(__ARM64__)
370 # define P_CPU_ARM_64
371 # else
372 # define P_CPU_ARM_32
373 # endif
374 # if defined(__ARM_ARCH) && __ARM_ARCH > 1
375 # define P_CPU_ARM __ARM_ARCH
376 # elif defined(__TARGET_ARCH_ARM) && __TARGET_ARCH_ARM > 1
377 # define P_CPU_ARM __TARGET_ARCH_ARM
378 # elif defined(_M_ARM) && _M_ARM > 1
379 # define P_CPU_ARM _M_ARM
380 # elif defined(__ARM64_ARCH_8__) || \
381  defined(__ARM_ARCH_8__) || \
382  defined(__ARM_ARCH_8A__) || \
383  defined(__aarch64__) || \
384  defined(__ARMv8__) || \
385  defined(__ARMv8_A__) || \
386  defined(_M_ARM_64) || \\
387  defined(__CORE_CORTEXAV8__)
388 # define P_CPU_ARM 8
389 # elif defined(__ARM_ARCH_7__) || \
390  defined(__ARM_ARCH_7A__) || \
391  defined(__ARM_ARCH_7R__) || \
392  defined(__ARM_ARCH_7M__) || \
393  defined(__ARM_ARCH_7S__) || \
394  defined(_ARM_ARCH_7) || \
395  defined(__CORE_CORTEXA__)
396 # define P_CPU_ARM 7
397 # elif defined(__ARM_ARCH_6__) || \
398  defined(__ARM_ARCH_6J__) || \
399  defined(__ARM_ARCH_6T2__) || \
400  defined(__ARM_ARCH_6Z__) || \
401  defined(__ARM_ARCH_6K__) || \
402  defined(__ARM_ARCH_6ZK__) || \
403  defined(__ARM_ARCH_6M__)
404 # define P_CPU_ARM 6
405 # elif defined(__ARM_ARCH_5__) || \
406  defined(__ARM_ARCH_5E__) || \
407  defined(__ARM_ARCH_5T__) || \
408  defined(__ARM_ARCH_5TE__) || \
409  defined(__ARM_ARCH_5TEJ__)
410 # define P_CPU_ARM 5
411 # elif defined(__ARM_ARCH_4__) || \
412  defined(__ARM_ARCH_4T__)
413 # define P_CPU_ARM 4
414 # elif defined(__ARM_ARCH_3__) || \
415  defined(__ARM_ARCH_3M__)
416 # define P_CPU_ARM 3
417 # elif defined(__ARM_ARCH_2__)
418 # define P_CPU_ARM 2
419 # else
420 # define P_CPU_ARM 0
421 # endif
422 # if P_CPU_ARM == 8
423 # define P_CPU_ARM_V8
424 # elif P_CPU_ARM == 7
425 # define P_CPU_ARM_V7
426 # elif P_CPU_ARM == 6
427 # define P_CPU_ARM_V6
428 # elif P_CPU_ARM == 5
429 # define P_CPU_ARM_V5
430 # elif P_CPU_ARM == 4
431 # define P_CPU_ARM_V4
432 # elif P_CPU_ARM == 3
433 # define P_CPU_ARM_V3
434 # elif P_CPU_ARM == 2
435 # define P_CPU_ARM_V2
436 # else
437 # error "ARM architecture is uknown or too old"
438 # endif
439 #elif defined(__i386__) || defined(__i386) || defined(_M_IX86)
440 # define P_CPU_X86_32
441 # if defined(_M_IX86)
442 # if (_M_IX86 >= 300 &&_M_IX86 <= 600)
443 # define P_CPU_X86 (_M_IX86 / 100)
444 # else
445 # define P_CPU_X86 6
446 # endif
447 # elif defined(__i686__) || defined(__athlon__) || defined(__SSE__) || defined(__pentiumpro__)
448 # define P_CPU_X86 6
449 # elif defined(__i586__) || defined(__k6__) || defined(__pentium__)
450 # define P_CPU_X86 5
451 # elif defined(__i486__) || defined(__80486__)
452 # define P_CPU_X86 4
453 # else
454 # define P_CPU_X86 3
455 # endif
456 #elif defined(__x86_64__) || defined(__x86_64) || \
457  defined(__amd64__) || defined(__amd64) || \
458  defined(_M_X64) || defined(_M_AMD64)
459 # define P_CPU_X86_64
460 # define P_CPU_X86 6
461 #elif defined(__ia64__) || defined(__ia64) || defined(_M_IA64)
462 # define P_CPU_IA64
463 #elif defined(__mips__) || defined(__mips) || defined(_M_MRX000)
464 # define P_CPU_MIPS
465 # if defined(_M_MRX000)
466 # if (_M_MRX000 >= 10000)
467 # define P_CPU_MIPS_IV
468 # else
469 # define P_CPU_MIPS_III
470 # endif
471 # endif
472 # if defined(_MIPS_ARCH_MIPS64) || (defined(__mips) && __mips - 0 >= 64) || \
473  (defined(_MIPS_ISA) && defined(_MIPS_ISA_MIPS64) && __MIPS_ISA - 0 >= _MIPS_ISA_MIPS64)
474 # define P_CPU_MIPS_64
475 # elif defined(_MIPS_ARCH_MIPS32) || (defined(__mips) && __mips - 0 >= 32) || \
476  (defined(_MIPS_ISA) && defined(_MIPS_ISA_MIPS32) && __MIPS_ISA - 0 >= _MIPS_ISA_MIPS32)
477 # define P_CPU_MIPS_32
478 # elif defined(_MIPS_ARCH_MIPS4) || (defined(__mips) && __mips - 0 >= 4) || \
479  (defined(_MIPS_ISA) && defined(_MIPS_ISA_MIPS4) && __MIPS_ISA - 0 >= _MIPS_ISA_MIPS4)
480 # define P_CPU_MIPS_IV
481 # elif defined(_MIPS_ARCH_MIPS3) || (defined(__mips) && __mips - 0 >= 3) || \
482  (defined(_MIPS_ISA)&& defined(_MIPS_ISA_MIPS3) && __MIPS_ISA - 0 >= _MIPS_ISA_MIPS3)
483 # define P_CPU_MIPS_III
484 # elif defined(_MIPS_ARCH_MIPS2) || (defined(__mips) && __mips - 0 >= 2) || \
485  (defined(_MIPS_ISA) && defined(_MIPS_ISA_MIPS2) && __MIPS_ISA - 0 >= _MIPS_ISA_MIPS2)
486 # define P_CPU_MIPS_II
487 # elif defined(_MIPS_ARCH_MIPS1) || (defined(__mips) && __mips - 0 >= 1) || \
488  (defined(_MIPS_ISA) && defined(_MIPS_ISA_MIPS1) && __MIPS_ISA - 0 >= _MIPS_ISA_MIPS1)
489 # define P_CPU_MIPS_I
490 # endif
491 # if defined(P_CPU_MIPS_64)
492 # define P_CPU_MIPS_IV
493 # endif
494 # if defined(P_CPU_MIPS_IV)
495 # define P_CPU_MIPS_III
496 # endif
497 # if defined(P_CPU_MIPS_32) || defined(P_CPU_MIPS_III)
498 # define P_CPU_MIPS_II
499 # endif
500 # if defined(P_CPU_MIPS_II)
501 # define P_CPU_MIPS_I
502 # endif
503 #elif defined(__powerpc__) || defined(__powerpc) || defined(__ppc__) || defined(__ppc) || \
504  defined(_ARCH_PPC) || defined(_ARCH_PWR) || defined(_ARCH_COM) || \
505  defined(_M_PPC) || defined(_M_MPPC)
506 # define P_CPU_POWER
507 # if defined(__powerpc64__) || defined(__powerpc64) || defined(__ppc64__) || defined(__ppc64) || \
508  defined(__64BIT__) || defined(__LP64__) || defined(_LP64)
509 # define P_CPU_POWER_64
510 # else
511 # define P_CPU_POWER_32
512 # endif
513 #elif defined(__sparc__) || defined(__sparc)
514 # define P_CPU_SPARC
515 # if defined(__sparc_v9__) || defined(__sparcv9)
516 # define P_CPU_SPARC_V9
517 # elif defined(__sparc_v8__) || defined(__sparcv8)
518 # define P_CPU_SPARC_V8
519 # endif
520 #elif defined(__hppa__) || defined(__hppa)
521 # define P_CPU_HPPA
522 # if defined(_PA_RISC2_0) || defined(__RISC2_0__) || defined(__HPPA20__) || defined(__PA8000__)
523 # define P_CPU_HPPA_64
524 # else
525 # define P_CPU_HPPA_32
526 # endif
527 #endif
528 
529 /* We need this to generate full Doxygen documentation */
530 
531 #ifdef DOXYGEN
532 # ifndef P_CPU_ALPHA
533 # define P_CPU_ALPHA
534 # endif
535 # ifndef P_CPU_ARM
536 # define P_CPU_ARM
537 # endif
538 # ifndef P_CPU_ARM_32
539 # define P_CPU_ARM_32
540 # endif
541 # ifndef P_CPU_ARM_64
542 # define P_CPU_ARM_64
543 # endif
544 # ifndef P_CPU_ARM_V2
545 # define P_CPU_ARM_V2
546 # endif
547 # ifndef P_CPU_ARM_V3
548 # define P_CPU_ARM_V3
549 # endif
550 # ifndef P_CPU_ARM_V4
551 # define P_CPU_ARM_V4
552 # endif
553 # ifndef P_CPU_ARM_V5
554 # define P_CPU_ARM_V5
555 # endif
556 # ifndef P_CPU_ARM_V6
557 # define P_CPU_ARM_V6
558 # endif
559 # ifndef P_CPU_ARM_V7
560 # define P_CPU_ARM_V7
561 # endif
562 # ifndef P_CPU_ARM_V8
563 # define P_CPU_ARM_V8
564 # endif
565 # ifndef P_CPU_X86
566 # define P_CPU_X86
567 # endif
568 # ifndef P_CPU_X86_32
569 # define P_CPU_X86_32
570 # endif
571 # ifndef P_CPU_X86_64
572 # define P_CPU_X86_64
573 # endif
574 # ifndef P_CPU_IA64
575 # define P_CPU_IA64
576 # endif
577 # ifndef P_CPU_MIPS
578 # define P_CPU_MIPS
579 # endif
580 # ifndef P_CPU_MIPS_I
581 # define P_CPU_MIPS_I
582 # endif
583 # ifndef P_CPU_MIPS_II
584 # define P_CPU_MIPS_II
585 # endif
586 # ifndef P_CPU_MIPS_III
587 # define P_CPU_MIPS_III
588 # endif
589 # ifndef P_CPU_MIPS_IV
590 # define P_CPU_MIPS_IV
591 # endif
592 # ifndef P_CPU_MIPS_32
593 # define P_CPU_MIPS_32
594 # endif
595 # ifndef P_CPU_MIPS_64
596 # define P_CPU_MIPS_64
597 # endif
598 # ifndef P_CPU_POWER
599 # define P_CPU_POWER
600 # endif
601 # ifndef P_CPU_POWER_32
602 # define P_CPU_POWER_32
603 # endif
604 # ifndef P_CPU_POWER_64
605 # define P_CPU_POWER_64
606 # endif
607 # ifndef P_CPU_SPARC
608 # define P_CPU_SPARC
609 # endif
610 # ifndef P_CPU_SPARC_V8
611 # define P_CPU_SPARC_V8
612 # endif
613 # ifndef P_CPU_SPARC_V9
614 # define P_CPU_SPARC_V9
615 # endif
616 # ifndef P_CPU_HPPA
617 # define P_CPU_HPPA
618 # endif
619 # ifndef P_CPU_HPPA_32
620 # define P_CPU_HPPA_32
621 # endif
622 # ifndef P_CPU_HPPA_64
623 # define P_CPU_HPPA_64
624 # endif
625 #endif
626 
627 #endif /* PLIBSYS_HEADER_PMACROSCPU_H */