plibsys
pmacroscpu.h
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1 /*
2  * The MIT License
3  *
4  * Copyright (C) 2017-2023 Alexander Saprykin <saprykin.spb@gmail.com>
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining
7  * a copy of this software and associated documentation files (the
8  * 'Software'), to deal in the Software without restriction, including
9  * without limitation the rights to use, copy, modify, merge, publish,
10  * distribute, sublicense, and/or sell copies of the Software, and to
11  * permit persons to whom the Software is furnished to do so, subject to
12  * the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be
15  * included in all copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED 'AS IS', WITHOUT WARRANTY OF ANY KIND,
18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20  * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
21  * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
22  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
23  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24  */
25 
39 #if !defined (PLIBSYS_H_INSIDE) && !defined (PLIBSYS_COMPILATION)
40 # error "Header files shouldn't be included directly, consider using <plibsys.h> instead."
41 #endif
42 
43 #ifndef PLIBSYS_HEADER_PMACROSCPU_H
44 #define PLIBSYS_HEADER_PMACROSCPU_H
45 
46 /*
47  * List of supported CPU architectures (P_CPU_x):
48  *
49  * ALPHA - Alpha
50  * ARM - ARM architecture revision:
51  * v2, v3, v4, v5, v6, v7, v8, v9
52  * ARM_32 - ARM 32-bit
53  * ARM_64 - ARM 64-bit
54  * ARM_V2 - ARMv2 instruction set
55  * ARM_V3 - ARMv3 instruction set
56  * ARM_V4 - ARMv4 instruction set
57  * ARM_V5 - ARMv5 instruction set
58  * ARM_V6 - ARMv6 instruction set
59  * ARM_V7 - ARMv7 instruction set
60  * ARM_V8 - ARMv8 instruction set
61  * ARM_V9 - ARMv9 instruction set
62  * X86 - x86 architecture revision:
63  * 3, 4, 5, 6 (Intel P6 or better)
64  * X86_32 - x86 32-bit
65  * X86_64 - x86 64-bit
66  * IA64 - Intel Itanium (IA-64)
67  * MIPS - MIPS
68  * MIPS_I - MIPS I
69  * MIPS_II - MIPS II
70  * MIPS_III - MIPS III
71  * MIPS_IV - MIPS IV
72  * MIPS_V - MIPS V
73  * MIPS_32 - MIPS32
74  * MIPS_64 - MIPS64
75  * POWER - PowerPC
76  * POWER_32 - PowerPC 32-bit
77  * POWER_64 - PowerPC 64-bit
78  * SPARC - Sparc
79  * SPARC_V8 - Sparc V8
80  * SPARC_V9 - Sparc V9
81  * HPPA - HPPA-RISC
82  * HPPA_32 - HPPA-RISC 32-bit
83  * HPPA_64 - HPPA-RISC 64-bit
84  * S390 - IBM S/390
85  * S390X - IBM S/390x
86  * RISCV - RISC-V
87  * RISCV_32 - RISC-V 32-bit
88  * RISCV_64 - RISC-V 64-bit
89  * LOONGARCH - LoongArch
90  * LOONGARCH_32 - LoongArch 32-bit
91  * LOONGARCH_64 - LoongArch 64-bit
92  */
93 
464 #if defined(__alpha__) || defined(__alpha) || defined(_M_ALPHA)
465 # define P_CPU_ALPHA
466 #elif defined(__arm__) || defined(__TARGET_ARCH_ARM) || defined(_ARM) || \
467  defined(_M_ARM) || defined(_M_ARM64) || defined(__arm) || defined(__aarch64__) || \
468  defined(__ARM64__) || defined(__arm64__) || defined(__arm64)
469 # if defined(__aarch64__) || defined(_M_ARM64) || defined(__ARM64__) || \
470  defined(__arm64__) || defined(__arm64)
471 # define P_CPU_ARM_64
472 # else
473 # define P_CPU_ARM_32
474 # endif
475 # if defined(__ARM_ARCH) && __ARM_ARCH > 1
476 # define P_CPU_ARM __ARM_ARCH
477 # elif defined(__TARGET_ARCH_ARM) && __TARGET_ARCH_ARM > 1
478 # define P_CPU_ARM __TARGET_ARCH_ARM
479 # elif defined(_M_ARM) && _M_ARM > 1
480 # define P_CPU_ARM _M_ARM
481 # elif defined(__ARM_ARCH_9__)
482 # define P_CPU_ARM 9
483 # elif defined(__ARM64_ARCH_8__) || \
484  defined(__ARM_ARCH_8__) || \
485  defined(__ARM_ARCH_8A__) || \
486  defined(__aarch64__) || \
487  defined(__ARMv8__) || \
488  defined(__ARMv8_A__) || \
489  defined(_M_ARM64) || \
490  defined(__CORE_CORTEXAV8__)
491 # define P_CPU_ARM 8
492 # elif defined(__ARM_ARCH_7__) || \
493  defined(__ARM_ARCH_7A__) || \
494  defined(__ARM_ARCH_7R__) || \
495  defined(__ARM_ARCH_7M__) || \
496  defined(__ARM_ARCH_7S__) || \
497  defined(_ARM_ARCH_7) || \
498  defined(__CORE_CORTEXA__)
499 # define P_CPU_ARM 7
500 # elif defined(__ARM_ARCH_6__) || \
501  defined(__ARM_ARCH_6J__) || \
502  defined(__ARM_ARCH_6T2__) || \
503  defined(__ARM_ARCH_6Z__) || \
504  defined(__ARM_ARCH_6K__) || \
505  defined(__ARM_ARCH_6ZK__) || \
506  defined(__ARM_ARCH_6M__)
507 # define P_CPU_ARM 6
508 # elif defined(__ARM_ARCH_5__) || \
509  defined(__ARM_ARCH_5E__) || \
510  defined(__ARM_ARCH_5T__) || \
511  defined(__ARM_ARCH_5TE__) || \
512  defined(__ARM_ARCH_5TEJ__)
513 # define P_CPU_ARM 5
514 # elif defined(__ARM_ARCH_4__) || \
515  defined(__ARM_ARCH_4T__)
516 # define P_CPU_ARM 4
517 # elif defined(__ARM_ARCH_3__) || \
518  defined(__ARM_ARCH_3M__)
519 # define P_CPU_ARM 3
520 # elif defined(__ARM_ARCH_2__)
521 # define P_CPU_ARM 2
522 # else
523 # define P_CPU_ARM 0
524 # endif
525 # if P_CPU_ARM == 9
526 # define P_CPU_ARM_V9
527 # elif P_CPU_ARM == 8
528 # define P_CPU_ARM_V8
529 # elif P_CPU_ARM == 7
530 # define P_CPU_ARM_V7
531 # elif P_CPU_ARM == 6
532 # define P_CPU_ARM_V6
533 # elif P_CPU_ARM == 5
534 # define P_CPU_ARM_V5
535 # elif P_CPU_ARM == 4
536 # define P_CPU_ARM_V4
537 # elif P_CPU_ARM == 3
538 # define P_CPU_ARM_V3
539 # elif P_CPU_ARM == 2
540 # define P_CPU_ARM_V2
541 # else
542 # error "ARM architecture is uknown or too old"
543 # endif
544 #elif defined(__i386__) || defined(__i386) || defined(_M_IX86)
545 # define P_CPU_X86_32
546 # if defined(_M_IX86)
547 # if (_M_IX86 >= 300 &&_M_IX86 <= 600)
548 # define P_CPU_X86 (_M_IX86 / 100)
549 # else
550 # define P_CPU_X86 6
551 # endif
552 # elif defined(__i686__) || defined(__athlon__) || defined(__SSE__) || defined(__pentiumpro__)
553 # define P_CPU_X86 6
554 # elif defined(__i586__) || defined(__k6__) || defined(__pentium__)
555 # define P_CPU_X86 5
556 # elif defined(__i486__) || defined(__80486__)
557 # define P_CPU_X86 4
558 # else
559 # define P_CPU_X86 3
560 # endif
561 #elif defined(__x86_64__) || defined(__x86_64) || \
562  defined(__amd64__) || defined(__amd64) || \
563  defined(_M_X64) || defined(_M_AMD64)
564 # define P_CPU_X86_64
565 # define P_CPU_X86 6
566 #elif defined(__ia64__) || defined(__ia64) || defined(_M_IA64)
567 # define P_CPU_IA64
568 #elif defined(__mips__) || defined(__mips) || defined(_M_MRX000)
569 # define P_CPU_MIPS
570 # if defined(_M_MRX000)
571 # if (_M_MRX000 >= 10000)
572 # define P_CPU_MIPS_IV
573 # else
574 # define P_CPU_MIPS_III
575 # endif
576 # endif
577 # if defined(_MIPS_ARCH_MIPS64) || defined(__mips64) || (defined(__mips) && __mips - 0 >= 64) || \
578  (defined(_MIPS_ISA) && defined(_MIPS_ISA_MIPS64) && __MIPS_ISA - 0 >= _MIPS_ISA_MIPS64)
579 # define P_CPU_MIPS_64
580 # elif defined(_MIPS_ARCH_MIPS32) || defined(__mips32) || (defined(__mips) && __mips - 0 >= 32) || \
581  (defined(_MIPS_ISA) && defined(_MIPS_ISA_MIPS32) && __MIPS_ISA - 0 >= _MIPS_ISA_MIPS32)
582 # define P_CPU_MIPS_32
583 # elif defined(_MIPS_ARCH_MIPS5) || (defined(__mips) && __mips - 0 >= 5) || \
584  (defined(_MIPS_ISA) && defined(_MIPS_ISA_MIPS5) && __MIPS_ISA - 0 >= _MIPS_ISA_MIPS5)
585 # define P_CPU_MIPS_V
586 # elif defined(_MIPS_ARCH_MIPS4) || (defined(__mips) && __mips - 0 >= 4) || \
587  (defined(_MIPS_ISA) && defined(_MIPS_ISA_MIPS4) && __MIPS_ISA - 0 >= _MIPS_ISA_MIPS4)
588 # define P_CPU_MIPS_IV
589 # elif defined(_MIPS_ARCH_MIPS3) || (defined(__mips) && __mips - 0 >= 3) || \
590  (defined(_MIPS_ISA)&& defined(_MIPS_ISA_MIPS3) && __MIPS_ISA - 0 >= _MIPS_ISA_MIPS3)
591 # define P_CPU_MIPS_III
592 # elif defined(_MIPS_ARCH_MIPS2) || (defined(__mips) && __mips - 0 >= 2) || \
593  (defined(_MIPS_ISA) && defined(_MIPS_ISA_MIPS2) && __MIPS_ISA - 0 >= _MIPS_ISA_MIPS2)
594 # define P_CPU_MIPS_II
595 # elif defined(_MIPS_ARCH_MIPS1) || (defined(__mips) && __mips - 0 >= 1) || \
596  (defined(_MIPS_ISA) && defined(_MIPS_ISA_MIPS1) && __MIPS_ISA - 0 >= _MIPS_ISA_MIPS1)
597 # define P_CPU_MIPS_I
598 # endif
599 # if defined(P_CPU_MIPS_64)
600 # define P_CPU_MIPS_V
601 # endif
602 # if defined(P_CPU_MIPS_V)
603 # define P_CPU_MIPS_IV
604 # endif
605 # if defined(P_CPU_MIPS_IV)
606 # define P_CPU_MIPS_III
607 # endif
608 # if defined(P_CPU_MIPS_32) || defined(P_CPU_MIPS_III)
609 # define P_CPU_MIPS_II
610 # endif
611 # if defined(P_CPU_MIPS_II)
612 # define P_CPU_MIPS_I
613 # endif
614 #elif defined(__powerpc__) || defined(__powerpc) || defined(__ppc__) || defined(__ppc) || \
615  defined(_ARCH_PPC) || defined(_ARCH_PWR) || defined(_ARCH_COM) || \
616  defined(_M_PPC) || defined(_M_MPPC)
617 # define P_CPU_POWER
618 # if defined(__powerpc64__) || defined(__powerpc64) || defined(__ppc64__) || defined(__ppc64) || \
619  defined(__64BIT__) || defined(__LP64__) || defined(_LP64)
620 # define P_CPU_POWER_64
621 # else
622 # define P_CPU_POWER_32
623 # endif
624 #elif defined(__sparc__) || defined(__sparc)
625 # define P_CPU_SPARC
626 # if defined(__sparc_v9__) || defined(__sparcv9)
627 # define P_CPU_SPARC_V9
628 # elif defined(__sparc_v8__) || defined(__sparcv8)
629 # define P_CPU_SPARC_V8
630 # endif
631 #elif defined(__hppa__) || defined(__hppa)
632 # define P_CPU_HPPA
633 # if defined(_PA_RISC2_0) || defined(__RISC2_0__) || defined(__HPPA20__) || defined(__PA8000__)
634 # define P_CPU_HPPA_64
635 # else
636 # define P_CPU_HPPA_32
637 # endif
638 #elif defined(__s390__)
639 # define P_CPU_S390
640 # if defined(__s390x__)
641 # define P_CPU_S390X
642 # endif
643 #elif defined(__riscv) || defined(__riscv__)
644 # define P_CPU_RISCV
645 # if defined(__riscv64) || (defined(__riscv_xlen) && (__riscv_xlen == 64))
646 # define P_CPU_RISCV_64
647 # else
648 # define P_CPU_RISCV_32
649 # endif
650 #elif defined(__loongarch__)
651 # define P_CPU_LOONGARCH
652 # if defined(__loongarch64) || (__loongarch_grlen == 64)
653 # define P_CPU_LOONGARCH_64
654 # else
655 # define P_CPU_LOONGARCH_32
656 # endif
657 #endif
658 
659 /* We need this to generate full Doxygen documentation */
660 
661 #ifdef DOXYGEN
662 # ifndef P_CPU_ALPHA
663 # define P_CPU_ALPHA
664 # endif
665 # ifndef P_CPU_ARM
666 # define P_CPU_ARM
667 # endif
668 # ifndef P_CPU_ARM_32
669 # define P_CPU_ARM_32
670 # endif
671 # ifndef P_CPU_ARM_64
672 # define P_CPU_ARM_64
673 # endif
674 # ifndef P_CPU_ARM_V2
675 # define P_CPU_ARM_V2
676 # endif
677 # ifndef P_CPU_ARM_V3
678 # define P_CPU_ARM_V3
679 # endif
680 # ifndef P_CPU_ARM_V4
681 # define P_CPU_ARM_V4
682 # endif
683 # ifndef P_CPU_ARM_V5
684 # define P_CPU_ARM_V5
685 # endif
686 # ifndef P_CPU_ARM_V6
687 # define P_CPU_ARM_V6
688 # endif
689 # ifndef P_CPU_ARM_V7
690 # define P_CPU_ARM_V7
691 # endif
692 # ifndef P_CPU_ARM_V8
693 # define P_CPU_ARM_V8
694 # endif
695 # ifndef P_CPU_ARM_V9
696 # define P_CPU_ARM_V9
697 # endif
698 # ifndef P_CPU_X86
699 # define P_CPU_X86
700 # endif
701 # ifndef P_CPU_X86_32
702 # define P_CPU_X86_32
703 # endif
704 # ifndef P_CPU_X86_64
705 # define P_CPU_X86_64
706 # endif
707 # ifndef P_CPU_IA64
708 # define P_CPU_IA64
709 # endif
710 # ifndef P_CPU_MIPS
711 # define P_CPU_MIPS
712 # endif
713 # ifndef P_CPU_MIPS_I
714 # define P_CPU_MIPS_I
715 # endif
716 # ifndef P_CPU_MIPS_II
717 # define P_CPU_MIPS_II
718 # endif
719 # ifndef P_CPU_MIPS_III
720 # define P_CPU_MIPS_III
721 # endif
722 # ifndef P_CPU_MIPS_IV
723 # define P_CPU_MIPS_IV
724 # endif
725 # ifndef P_CPU_MIPS_V
726 # define P_CPU_MIPS_V
727 # endif
728 # ifndef P_CPU_MIPS_32
729 # define P_CPU_MIPS_32
730 # endif
731 # ifndef P_CPU_MIPS_64
732 # define P_CPU_MIPS_64
733 # endif
734 # ifndef P_CPU_POWER
735 # define P_CPU_POWER
736 # endif
737 # ifndef P_CPU_POWER_32
738 # define P_CPU_POWER_32
739 # endif
740 # ifndef P_CPU_POWER_64
741 # define P_CPU_POWER_64
742 # endif
743 # ifndef P_CPU_SPARC
744 # define P_CPU_SPARC
745 # endif
746 # ifndef P_CPU_SPARC_V8
747 # define P_CPU_SPARC_V8
748 # endif
749 # ifndef P_CPU_SPARC_V9
750 # define P_CPU_SPARC_V9
751 # endif
752 # ifndef P_CPU_HPPA
753 # define P_CPU_HPPA
754 # endif
755 # ifndef P_CPU_HPPA_32
756 # define P_CPU_HPPA_32
757 # endif
758 # ifndef P_CPU_HPPA_64
759 # define P_CPU_HPPA_64
760 # endif
761 # ifndef P_CPU_S390
762 # define P_CPU_S390
763 # endif
764 # ifndef P_CPU_S390X
765 # define P_CPU_S390X
766 # endif
767 # ifndef P_CPU_RISCV
768 # define P_CPU_RISCV
769 # endif
770 # ifndef P_CPU_RISCV_32
771 # define P_CPU_RISCV_32
772 # endif
773 # ifndef P_CPU_RISCV_64
774 # define P_CPU_RISCV_64
775 # endif
776 # ifndef P_CPU_LOONGARCH
777 # define P_CPU_LOONGARCH
778 # endif
779 # ifndef P_CPU_LOONGARCH_32
780 # define P_CPU_LOONGARCH_32
781 # endif
782 # ifndef P_CPU_LOONGARCH_64
783 # define P_CPU_LOONGARCH_64
784 # endif
785 #endif
786 
787 #endif /* PLIBSYS_HEADER_PMACROSCPU_H */
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