rtl Architecture Reference

Architecture rtl of blink entity. More...

Processes
pr_count	( clk_in , rst_in )
	Process to count and toggle.

Signals
count	integer range 0 TO max_count
	Internal counter.
led	std_logic
	Current led.

Detailed Description

Architecture rtl of blink entity.

Definition at line 28 of file blink.vhd.

Member Function Documentation

pr_count()

pr_count (   clk_in ,   rst_in   )

Process

Process to count and toggle.

This process counts clocks and toggles the state when appropriate.

Definition at line 41 of file blink.vhd.

    BEGIN

        IF (rst_in = '1') THEN
            count <= 0;
            led   <= '0';
        ELSIF (rising_edge(clk_in)) THEN
            IF (count = max_count) THEN
                count <= 0;
                led   <= NOT led;
            ELSE
                count <= count + 1;
            END IF;
        END IF;

    END PROCESS pr_count;

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The documentation for this class was generated from the following file:

• fpga/common/utility/source/blink.vhd