sim Architecture Reference

Architectur sim of entity sim_drv8711_spi. More...

Processes
pr_spi	( rst_in , spi_scs_in , spi_sclk_in )
	Process to handle SPI traffic.

Signals
dat_miso	std_logic_vector ( 15 DOWNTO 0 )
dat_mosi	std_logic_vector ( 15 DOWNTO 0 )

Detailed Description

Architectur sim of entity sim_drv8711_spi.

Definition at line 29 of file sim_drv8711_spi.vhd.

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The documentation for this class was generated from the following file:

• fpga/common/devices/sim/sim_drv8711_spi.vhd