ProcessingTile.h File Reference

This class models an entire processing element that contains RAM memory (3x), DMA, NoC Router, HFRiscV core. More...

#include <iostream>
#include <THFRiscV.h>
#include <TDmaNetif.h>
#include <TRouter.h>
#include <UMemory.h>
#include <USignal.h>
#include <Tile.h>
#include <MemoryMap.h>

Go to the source code of this file.

Classes
class	ProcessingTile

Macros
#define	MEM0_SIZE   ORCA_MEMORY_SIZE
	This file is part of project URSA. More...
#define	MEM0_BASE   ORCA_MEMORY_BASE

Detailed Description

This class models an entire processing element that contains RAM memory (3x), DMA, NoC Router, HFRiscV core.

This class models an entire processing element that contains RAM memory, DMA for the SIMD vector unit, HFRiscV core.

Definition in file ProcessingTile.h.

Macro Definition Documentation

MEM0_BASE

#define MEM0_BASE   ORCA_MEMORY_BASE

Definition at line 63 of file ProcessingTile.h.

MEM0_SIZE

#define MEM0_SIZE   ORCA_MEMORY_SIZE

This file is part of project URSA.

More information on the project can be found at URSA's repository at GitHub

http://https://github.com/andersondomingues/ursa

Copyright (C) 2018 Anderson Domingues, ti.an.nosp@m.ders.nosp@m.ondom.nosp@m.ingu.nosp@m.es@gm.nosp@m.ail..nosp@m.com

This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.

This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.

You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.

Definition at line 62 of file ProcessingTile.h.