29 #ifdef ORCA_ENABLE_GDBRSP 31 uint32_t TProcessorBase<T>::GDBSERVER_PORT = ORCA_GDBRSP_PORT;
52 _state.pc_prev = initial_pc;
53 _state.pc = initial_pc;
54 _state.pc_next = _state.pc +
sizeof(T);
57 #ifdef ORCA_ENABLE_GDBRSP 61 _gdbserver =
new RspServer<T>(&_state,
62 _memory,
"127.0.0.1", GDBSERVER_PORT++);
66 _state.terminated =
false;
71 #ifdef ORCA_ENABLE_GDBRSP This class models a TimedModel.
Defines a generic state model for use within processor models.
This class models a memory module.
This class implements the base operation for generic processor implementations.
#define NUMBER_OF_REGISTERS