orca-sim
ProcessorBase.cpp
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1 /******************************************************************************
2  * This file is part of project ORCA. More information on the project
3  * can be found at the following repositories at GitHub's website.
4  *
5  * http://https://github.com/andersondomingues/orca-sim
6  * http://https://github.com/andersondomingues/orca-software
7  * http://https://github.com/andersondomingues/orca-mpsoc
8  * http://https://github.com/andersondomingues/orca-tools
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10  * Copyright (C) 2018-2020 Anderson Domingues, <ti.andersondomingues@gmail.com>
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25 ******************************************************************************/
26 #include "TimedModel.hpp"
27 #include "ProcessorBase.hpp"
28 
29 #ifdef ORCA_ENABLE_GDBRSP
30 template <typename T>
31 uint32_t TProcessorBase<T>::GDBSERVER_PORT = ORCA_GDBRSP_PORT;
32 #endif
33 
39 
40 template <typename T>
42  MemoryAddr initial_pc, Memory* mem) : TimedModel(name) {
43 
44  // set mem ptr
45  _memory = mem;
46 
47  // reset registers
48  for (int i = 0; i < NUMBER_OF_REGISTERS; i++)
49  _state.regs[i] = 0;
50 
51  // reset PC
52  _state.pc_prev = initial_pc;
53  _state.pc = initial_pc;
54  _state.pc_next = _state.pc + sizeof(T);
55 
56  // reset flags
57  #ifdef ORCA_ENABLE_GDBRSP
58  _state.bp = 0; // no breakpoint reached yet
59  _state.pause = 1; // starts paused in gdb mode
60  _state.steps = 0; // no steps to be performed, wait for gdb
61  _gdbserver = new RspServer<T>(&_state,
62  _memory, "127.0.0.1", GDBSERVER_PORT++);
63  #endif
64 
65  // reset special flags
66  _state.terminated = false;
67 }
68 
69 template <typename T>
71  #ifdef ORCA_ENABLE_GDBRSP
72  delete _gdbserver;
73  #endif
74 }
75 
80 template <typename T>
82  return &_state;
83 }
84 
85 template <typename T>
87  return _memory;
88 }
89 
90 template <typename T>
92  return 0;
93  // nothing todo
94 }
This class models a TimedModel.
Definition: TimedModel.hpp:42
#define MemoryAddr
Definition: MemoryType.hpp:34
uint32_t SimulationTime
Defines a generic state model for use within processor models.
This class models a memory module.
Definition: Memory.hpp:55
This class implements the base operation for generic processor implementations.
#define NUMBER_OF_REGISTERS