Processor Counter Monitor
pcm::SocketCounterState Member List

This is the complete list of members for pcm::SocketCounterState, including all inherited members.

AllSlotsRaw (defined in pcm::BasicCounterState)pcm::BasicCounterStateprotected
ArchLLCMissPos enum value (defined in pcm::BasicCounterState)pcm::BasicCounterStateprotected
ArchLLCRefPos enum value (defined in pcm::BasicCounterState)pcm::BasicCounterStateprotected
BackendBoundSlots (defined in pcm::BasicCounterState)pcm::BasicCounterStateprotected
BadSpeculationSlots (defined in pcm::BasicCounterState)pcm::BasicCounterStateprotected
BasicCounterState() (defined in pcm::BasicCounterState)pcm::BasicCounterStateinline
BasicCounterState(const BasicCounterState &)=default (defined in pcm::BasicCounterState)pcm::BasicCounterState
BasicCounterState(BasicCounterState &&)=default (defined in pcm::BasicCounterState)pcm::BasicCounterState
CpuClkUnhaltedRef (defined in pcm::BasicCounterState)pcm::BasicCounterStateprotected
CpuClkUnhaltedThread (defined in pcm::BasicCounterState)pcm::BasicCounterStateprotected
CStateResidency (defined in pcm::BasicCounterState)pcm::BasicCounterStateprotected
CStateResidency (defined in pcm::UncoreCounterState)pcm::UncoreCounterStateprotected
DRAMEnergyStatus (defined in pcm::UncoreCounterState)pcm::UncoreCounterStateprotected
Event (defined in pcm::BasicCounterState)pcm::BasicCounterStateprotected
FrontendBoundSlots (defined in pcm::BasicCounterState)pcm::BasicCounterStateprotected
getThermalHeadroom() constpcm::BasicCounterStateinline
InstRetiredAny (defined in pcm::BasicCounterState)pcm::BasicCounterStateprotected
InvariantTSC (defined in pcm::BasicCounterState)pcm::BasicCounterStateprotected
L2HitMPos enum value (defined in pcm::BasicCounterState)pcm::BasicCounterStateprotected
L2HitPos enum value (defined in pcm::BasicCounterState)pcm::BasicCounterStateprotected
L3MissPos enum value (defined in pcm::BasicCounterState)pcm::BasicCounterStateprotected
L3Occupancy (defined in pcm::BasicCounterState)pcm::BasicCounterStateprotected
L3UnsharedHitPos enum value (defined in pcm::BasicCounterState)pcm::BasicCounterStateprotected
MemoryBWLocal (defined in pcm::BasicCounterState)pcm::BasicCounterStateprotected
MemoryBWTotal (defined in pcm::BasicCounterState)pcm::BasicCounterStateprotected
MSRValues (defined in pcm::BasicCounterState)pcm::BasicCounterStateprotected
operator+=(const BasicCounterState &ccs) (defined in pcm::SocketCounterState)pcm::SocketCounterStateinline
operator+=(const UncoreCounterState &ucs) (defined in pcm::SocketCounterState)pcm::SocketCounterStateinline
operator=(SocketCounterState &&)=default (defined in pcm::SocketCounterState)pcm::SocketCounterState
operator=(UncoreCounterState &&ucs) (defined in pcm::SocketCounterState)pcm::SocketCounterStateinline
operator=(BasicCounterState &&)=default (defined in pcm::BasicCounterState)pcm::BasicCounterState
PackageEnergyStatus (defined in pcm::UncoreCounterState)pcm::UncoreCounterStateprotected
PCM (defined in pcm::SocketCounterState)pcm::SocketCounterStatefriend
readAndAggregate(std::shared_ptr< SafeMsrHandle > handle) (defined in pcm::SocketCounterState)pcm::SocketCounterStateinlineprotected
readAndAggregateTSC(std::shared_ptr< SafeMsrHandle >) (defined in pcm::BasicCounterState)pcm::BasicCounterState
RetiringSlots (defined in pcm::BasicCounterState)pcm::BasicCounterStateprotected
SKLL2MissPos enum value (defined in pcm::BasicCounterState)pcm::BasicCounterStateprotected
SKLL3HitPos enum value (defined in pcm::BasicCounterState)pcm::BasicCounterStateprotected
SMICount (defined in pcm::BasicCounterState)pcm::BasicCounterStateprotected
SocketCounterState()=default (defined in pcm::SocketCounterState)pcm::SocketCounterState
SocketCounterState(const SocketCounterState &)=default (defined in pcm::SocketCounterState)pcm::SocketCounterState
SocketCounterState(SocketCounterState &&)=default (defined in pcm::SocketCounterState)pcm::SocketCounterState
ThermalHeadroom (defined in pcm::BasicCounterState)pcm::BasicCounterStateprotected
TORInsertsIAMiss (defined in pcm::UncoreCounterState)pcm::UncoreCounterStateprotected
TOROccupancyIAMiss (defined in pcm::UncoreCounterState)pcm::UncoreCounterStateprotected
UncClocks (defined in pcm::UncoreCounterState)pcm::UncoreCounterStateprotected
UncEDCFullWrites (defined in pcm::UncoreCounterState)pcm::UncoreCounterStateprotected
UncEDCNormalReads (defined in pcm::UncoreCounterState)pcm::UncoreCounterStateprotected
UncHALocalRequests (defined in pcm::UncoreCounterState)pcm::UncoreCounterStateprotected
UncHARequests (defined in pcm::UncoreCounterState)pcm::UncoreCounterStateprotected
UncMCFullWrites (defined in pcm::UncoreCounterState)pcm::UncoreCounterStateprotected
UncMCGTRequests (defined in pcm::UncoreCounterState)pcm::UncoreCounterStateprotected
UncMCIARequests (defined in pcm::UncoreCounterState)pcm::UncoreCounterStateprotected
UncMCIORequests (defined in pcm::UncoreCounterState)pcm::UncoreCounterStateprotected
UncMCNormalReads (defined in pcm::UncoreCounterState)pcm::UncoreCounterStateprotected
UncoreCounterState() (defined in pcm::UncoreCounterState)pcm::UncoreCounterStateinline
UncoreCounterState(const UncoreCounterState &)=default (defined in pcm::UncoreCounterState)pcm::UncoreCounterState
UncoreCounterState(UncoreCounterState &&)=default (defined in pcm::UncoreCounterState)pcm::UncoreCounterState
UncPMMReads (defined in pcm::UncoreCounterState)pcm::UncoreCounterStateprotected
UncPMMWrites (defined in pcm::UncoreCounterState)pcm::UncoreCounterStateprotected
~ SocketCounterState() (defined in pcm::SocketCounterState)pcm::SocketCounterStateinlinevirtual
~BasicCounterState() (defined in pcm::BasicCounterState)pcm::BasicCounterStateinlinevirtual
~UncoreCounterState() (defined in pcm::UncoreCounterState)pcm::UncoreCounterStateinlinevirtual