21 #ifndef STM32F1xx_HAL_GPIO_EX_H 22 #define STM32F1xx_HAL_GPIO_EX_H 54 #define AFIO_EVENTOUT_PIN_0 AFIO_EVCR_PIN_PX0 55 #define AFIO_EVENTOUT_PIN_1 AFIO_EVCR_PIN_PX1 56 #define AFIO_EVENTOUT_PIN_2 AFIO_EVCR_PIN_PX2 57 #define AFIO_EVENTOUT_PIN_3 AFIO_EVCR_PIN_PX3 58 #define AFIO_EVENTOUT_PIN_4 AFIO_EVCR_PIN_PX4 59 #define AFIO_EVENTOUT_PIN_5 AFIO_EVCR_PIN_PX5 60 #define AFIO_EVENTOUT_PIN_6 AFIO_EVCR_PIN_PX6 61 #define AFIO_EVENTOUT_PIN_7 AFIO_EVCR_PIN_PX7 62 #define AFIO_EVENTOUT_PIN_8 AFIO_EVCR_PIN_PX8 63 #define AFIO_EVENTOUT_PIN_9 AFIO_EVCR_PIN_PX9 64 #define AFIO_EVENTOUT_PIN_10 AFIO_EVCR_PIN_PX10 65 #define AFIO_EVENTOUT_PIN_11 AFIO_EVCR_PIN_PX11 66 #define AFIO_EVENTOUT_PIN_12 AFIO_EVCR_PIN_PX12 67 #define AFIO_EVENTOUT_PIN_13 AFIO_EVCR_PIN_PX13 68 #define AFIO_EVENTOUT_PIN_14 AFIO_EVCR_PIN_PX14 69 #define AFIO_EVENTOUT_PIN_15 AFIO_EVCR_PIN_PX15 71 #define IS_AFIO_EVENTOUT_PIN(__PIN__) (((__PIN__) == AFIO_EVENTOUT_PIN_0) || \ 72 ((__PIN__) == AFIO_EVENTOUT_PIN_1) || \ 73 ((__PIN__) == AFIO_EVENTOUT_PIN_2) || \ 74 ((__PIN__) == AFIO_EVENTOUT_PIN_3) || \ 75 ((__PIN__) == AFIO_EVENTOUT_PIN_4) || \ 76 ((__PIN__) == AFIO_EVENTOUT_PIN_5) || \ 77 ((__PIN__) == AFIO_EVENTOUT_PIN_6) || \ 78 ((__PIN__) == AFIO_EVENTOUT_PIN_7) || \ 79 ((__PIN__) == AFIO_EVENTOUT_PIN_8) || \ 80 ((__PIN__) == AFIO_EVENTOUT_PIN_9) || \ 81 ((__PIN__) == AFIO_EVENTOUT_PIN_10) || \ 82 ((__PIN__) == AFIO_EVENTOUT_PIN_11) || \ 83 ((__PIN__) == AFIO_EVENTOUT_PIN_12) || \ 84 ((__PIN__) == AFIO_EVENTOUT_PIN_13) || \ 85 ((__PIN__) == AFIO_EVENTOUT_PIN_14) || \ 86 ((__PIN__) == AFIO_EVENTOUT_PIN_15)) 95 #define AFIO_EVENTOUT_PORT_A AFIO_EVCR_PORT_PA 96 #define AFIO_EVENTOUT_PORT_B AFIO_EVCR_PORT_PB 97 #define AFIO_EVENTOUT_PORT_C AFIO_EVCR_PORT_PC 98 #define AFIO_EVENTOUT_PORT_D AFIO_EVCR_PORT_PD 99 #define AFIO_EVENTOUT_PORT_E AFIO_EVCR_PORT_PE 101 #define IS_AFIO_EVENTOUT_PORT(__PORT__) (((__PORT__) == AFIO_EVENTOUT_PORT_A) || \ 102 ((__PORT__) == AFIO_EVENTOUT_PORT_B) || \ 103 ((__PORT__) == AFIO_EVENTOUT_PORT_C) || \ 104 ((__PORT__) == AFIO_EVENTOUT_PORT_D) || \ 105 ((__PORT__) == AFIO_EVENTOUT_PORT_E)) 124 #define __HAL_AFIO_REMAP_SPI1_ENABLE() AFIO_REMAP_ENABLE(AFIO_MAPR_SPI1_REMAP) 131 #define __HAL_AFIO_REMAP_SPI1_DISABLE() AFIO_REMAP_DISABLE(AFIO_MAPR_SPI1_REMAP) 138 #define __HAL_AFIO_REMAP_I2C1_ENABLE() AFIO_REMAP_ENABLE(AFIO_MAPR_I2C1_REMAP) 145 #define __HAL_AFIO_REMAP_I2C1_DISABLE() AFIO_REMAP_DISABLE(AFIO_MAPR_I2C1_REMAP) 152 #define __HAL_AFIO_REMAP_USART1_ENABLE() AFIO_REMAP_ENABLE(AFIO_MAPR_USART1_REMAP) 159 #define __HAL_AFIO_REMAP_USART1_DISABLE() AFIO_REMAP_DISABLE(AFIO_MAPR_USART1_REMAP) 166 #define __HAL_AFIO_REMAP_USART2_ENABLE() AFIO_REMAP_ENABLE(AFIO_MAPR_USART2_REMAP) 173 #define __HAL_AFIO_REMAP_USART2_DISABLE() AFIO_REMAP_DISABLE(AFIO_MAPR_USART2_REMAP) 180 #define __HAL_AFIO_REMAP_USART3_ENABLE() AFIO_REMAP_PARTIAL(AFIO_MAPR_USART3_REMAP_FULLREMAP, AFIO_MAPR_USART3_REMAP_FULLREMAP) 187 #define __HAL_AFIO_REMAP_USART3_PARTIAL() AFIO_REMAP_PARTIAL(AFIO_MAPR_USART3_REMAP_PARTIALREMAP, AFIO_MAPR_USART3_REMAP_FULLREMAP) 194 #define __HAL_AFIO_REMAP_USART3_DISABLE() AFIO_REMAP_PARTIAL(AFIO_MAPR_USART3_REMAP_NOREMAP, AFIO_MAPR_USART3_REMAP_FULLREMAP) 201 #define __HAL_AFIO_REMAP_TIM1_ENABLE() AFIO_REMAP_PARTIAL(AFIO_MAPR_TIM1_REMAP_FULLREMAP, AFIO_MAPR_TIM1_REMAP_FULLREMAP) 208 #define __HAL_AFIO_REMAP_TIM1_PARTIAL() AFIO_REMAP_PARTIAL(AFIO_MAPR_TIM1_REMAP_PARTIALREMAP, AFIO_MAPR_TIM1_REMAP_FULLREMAP) 215 #define __HAL_AFIO_REMAP_TIM1_DISABLE() AFIO_REMAP_PARTIAL(AFIO_MAPR_TIM1_REMAP_NOREMAP, AFIO_MAPR_TIM1_REMAP_FULLREMAP) 222 #define __HAL_AFIO_REMAP_TIM2_ENABLE() AFIO_REMAP_PARTIAL(AFIO_MAPR_TIM2_REMAP_FULLREMAP, AFIO_MAPR_TIM2_REMAP_FULLREMAP) 229 #define __HAL_AFIO_REMAP_TIM2_PARTIAL_2() AFIO_REMAP_PARTIAL(AFIO_MAPR_TIM2_REMAP_PARTIALREMAP2, AFIO_MAPR_TIM2_REMAP_FULLREMAP) 236 #define __HAL_AFIO_REMAP_TIM2_PARTIAL_1() AFIO_REMAP_PARTIAL(AFIO_MAPR_TIM2_REMAP_PARTIALREMAP1, AFIO_MAPR_TIM2_REMAP_FULLREMAP) 243 #define __HAL_AFIO_REMAP_TIM2_DISABLE() AFIO_REMAP_PARTIAL(AFIO_MAPR_TIM2_REMAP_NOREMAP, AFIO_MAPR_TIM2_REMAP_FULLREMAP) 251 #define __HAL_AFIO_REMAP_TIM3_ENABLE() AFIO_REMAP_PARTIAL(AFIO_MAPR_TIM3_REMAP_FULLREMAP, AFIO_MAPR_TIM3_REMAP_FULLREMAP) 259 #define __HAL_AFIO_REMAP_TIM3_PARTIAL() AFIO_REMAP_PARTIAL(AFIO_MAPR_TIM3_REMAP_PARTIALREMAP, AFIO_MAPR_TIM3_REMAP_FULLREMAP) 267 #define __HAL_AFIO_REMAP_TIM3_DISABLE() AFIO_REMAP_PARTIAL(AFIO_MAPR_TIM3_REMAP_NOREMAP, AFIO_MAPR_TIM3_REMAP_FULLREMAP) 275 #define __HAL_AFIO_REMAP_TIM4_ENABLE() AFIO_REMAP_ENABLE(AFIO_MAPR_TIM4_REMAP) 283 #define __HAL_AFIO_REMAP_TIM4_DISABLE() AFIO_REMAP_DISABLE(AFIO_MAPR_TIM4_REMAP) 285 #if defined(AFIO_MAPR_CAN_REMAP_REMAP1) 292 #define __HAL_AFIO_REMAP_CAN1_1() AFIO_REMAP_PARTIAL(AFIO_MAPR_CAN_REMAP_REMAP1, AFIO_MAPR_CAN_REMAP) 299 #define __HAL_AFIO_REMAP_CAN1_2() AFIO_REMAP_PARTIAL(AFIO_MAPR_CAN_REMAP_REMAP2, AFIO_MAPR_CAN_REMAP) 306 #define __HAL_AFIO_REMAP_CAN1_3() AFIO_REMAP_PARTIAL(AFIO_MAPR_CAN_REMAP_REMAP3, AFIO_MAPR_CAN_REMAP) 318 #define __HAL_AFIO_REMAP_PD01_ENABLE() AFIO_REMAP_ENABLE(AFIO_MAPR_PD01_REMAP) 328 #define __HAL_AFIO_REMAP_PD01_DISABLE() AFIO_REMAP_DISABLE(AFIO_MAPR_PD01_REMAP) 330 #if defined(AFIO_MAPR_TIM5CH4_IREMAP) 337 #define __HAL_AFIO_REMAP_TIM5CH4_ENABLE() AFIO_REMAP_ENABLE(AFIO_MAPR_TIM5CH4_IREMAP) 345 #define __HAL_AFIO_REMAP_TIM5CH4_DISABLE() AFIO_REMAP_DISABLE(AFIO_MAPR_TIM5CH4_IREMAP) 348 #if defined(AFIO_MAPR_ETH_REMAP) 355 #define __HAL_AFIO_REMAP_ETH_ENABLE() AFIO_REMAP_ENABLE(AFIO_MAPR_ETH_REMAP) 363 #define __HAL_AFIO_REMAP_ETH_DISABLE() AFIO_REMAP_DISABLE(AFIO_MAPR_ETH_REMAP) 366 #if defined(AFIO_MAPR_CAN2_REMAP) 374 #define __HAL_AFIO_REMAP_CAN2_ENABLE() AFIO_REMAP_ENABLE(AFIO_MAPR_CAN2_REMAP) 382 #define __HAL_AFIO_REMAP_CAN2_DISABLE() AFIO_REMAP_DISABLE(AFIO_MAPR_CAN2_REMAP) 385 #if defined(AFIO_MAPR_MII_RMII_SEL) 392 #define __HAL_AFIO_ETH_RMII() AFIO_REMAP_ENABLE(AFIO_MAPR_MII_RMII_SEL) 400 #define __HAL_AFIO_ETH_MII() AFIO_REMAP_DISABLE(AFIO_MAPR_MII_RMII_SEL) 408 #define __HAL_AFIO_REMAP_ADC1_ETRGINJ_ENABLE() AFIO_REMAP_ENABLE(AFIO_MAPR_ADC1_ETRGINJ_REMAP) 415 #define __HAL_AFIO_REMAP_ADC1_ETRGINJ_DISABLE() AFIO_REMAP_DISABLE(AFIO_MAPR_ADC1_ETRGINJ_REMAP) 422 #define __HAL_AFIO_REMAP_ADC1_ETRGREG_ENABLE() AFIO_REMAP_ENABLE(AFIO_MAPR_ADC1_ETRGREG_REMAP) 429 #define __HAL_AFIO_REMAP_ADC1_ETRGREG_DISABLE() AFIO_REMAP_DISABLE(AFIO_MAPR_ADC1_ETRGREG_REMAP) 431 #if defined(AFIO_MAPR_ADC2_ETRGINJ_REMAP) 438 #define __HAL_AFIO_REMAP_ADC2_ETRGINJ_ENABLE() AFIO_REMAP_ENABLE(AFIO_MAPR_ADC2_ETRGINJ_REMAP) 445 #define __HAL_AFIO_REMAP_ADC2_ETRGINJ_DISABLE() AFIO_REMAP_DISABLE(AFIO_MAPR_ADC2_ETRGINJ_REMAP) 448 #if defined (AFIO_MAPR_ADC2_ETRGREG_REMAP) 455 #define __HAL_AFIO_REMAP_ADC2_ETRGREG_ENABLE() AFIO_REMAP_ENABLE(AFIO_MAPR_ADC2_ETRGREG_REMAP) 462 #define __HAL_AFIO_REMAP_ADC2_ETRGREG_DISABLE() AFIO_REMAP_DISABLE(AFIO_MAPR_ADC2_ETRGREG_REMAP) 470 #define __HAL_AFIO_REMAP_SWJ_ENABLE() AFIO_DBGAFR_CONFIG(AFIO_MAPR_SWJ_CFG_RESET) 477 #define __HAL_AFIO_REMAP_SWJ_NONJTRST() AFIO_DBGAFR_CONFIG(AFIO_MAPR_SWJ_CFG_NOJNTRST) 485 #define __HAL_AFIO_REMAP_SWJ_NOJTAG() AFIO_DBGAFR_CONFIG(AFIO_MAPR_SWJ_CFG_JTAGDISABLE) 492 #define __HAL_AFIO_REMAP_SWJ_DISABLE() AFIO_DBGAFR_CONFIG(AFIO_MAPR_SWJ_CFG_DISABLE) 494 #if defined(AFIO_MAPR_SPI3_REMAP) 502 #define __HAL_AFIO_REMAP_SPI3_ENABLE() AFIO_REMAP_ENABLE(AFIO_MAPR_SPI3_REMAP) 510 #define __HAL_AFIO_REMAP_SPI3_DISABLE() AFIO_REMAP_DISABLE(AFIO_MAPR_SPI3_REMAP) 513 #if defined(AFIO_MAPR_TIM2ITR1_IREMAP) 521 #define __HAL_AFIO_TIM2ITR1_TO_USB() AFIO_REMAP_ENABLE(AFIO_MAPR_TIM2ITR1_IREMAP) 529 #define __HAL_AFIO_TIM2ITR1_TO_ETH() AFIO_REMAP_DISABLE(AFIO_MAPR_TIM2ITR1_IREMAP) 532 #if defined(AFIO_MAPR_PTP_PPS_REMAP) 540 #define __HAL_AFIO_ETH_PTP_PPS_ENABLE() AFIO_REMAP_ENABLE(AFIO_MAPR_PTP_PPS_REMAP) 548 #define __HAL_AFIO_ETH_PTP_PPS_DISABLE() AFIO_REMAP_DISABLE(AFIO_MAPR_PTP_PPS_REMAP) 551 #if defined(AFIO_MAPR2_TIM9_REMAP) 558 #define __HAL_AFIO_REMAP_TIM9_ENABLE() SET_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM9_REMAP) 565 #define __HAL_AFIO_REMAP_TIM9_DISABLE() CLEAR_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM9_REMAP) 568 #if defined(AFIO_MAPR2_TIM10_REMAP) 575 #define __HAL_AFIO_REMAP_TIM10_ENABLE() SET_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM10_REMAP) 582 #define __HAL_AFIO_REMAP_TIM10_DISABLE() CLEAR_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM10_REMAP) 585 #if defined(AFIO_MAPR2_TIM11_REMAP) 591 #define __HAL_AFIO_REMAP_TIM11_ENABLE() SET_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM11_REMAP) 598 #define __HAL_AFIO_REMAP_TIM11_DISABLE() CLEAR_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM11_REMAP) 601 #if defined(AFIO_MAPR2_TIM13_REMAP) 608 #define __HAL_AFIO_REMAP_TIM13_ENABLE() SET_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM13_REMAP) 615 #define __HAL_AFIO_REMAP_TIM13_DISABLE() CLEAR_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM13_REMAP) 618 #if defined(AFIO_MAPR2_TIM14_REMAP) 625 #define __HAL_AFIO_REMAP_TIM14_ENABLE() SET_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM14_REMAP) 632 #define __HAL_AFIO_REMAP_TIM14_DISABLE() CLEAR_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM14_REMAP) 635 #if defined(AFIO_MAPR2_FSMC_NADV_REMAP) 642 #define __HAL_AFIO_FSMCNADV_DISCONNECTED() SET_BIT(AFIO->MAPR2, AFIO_MAPR2_FSMC_NADV_REMAP) 649 #define __HAL_AFIO_FSMCNADV_CONNECTED() CLEAR_BIT(AFIO->MAPR2, AFIO_MAPR2_FSMC_NADV_REMAP) 652 #if defined(AFIO_MAPR2_TIM15_REMAP) 659 #define __HAL_AFIO_REMAP_TIM15_ENABLE() SET_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM15_REMAP) 666 #define __HAL_AFIO_REMAP_TIM15_DISABLE() CLEAR_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM15_REMAP) 669 #if defined(AFIO_MAPR2_TIM16_REMAP) 676 #define __HAL_AFIO_REMAP_TIM16_ENABLE() SET_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM16_REMAP) 683 #define __HAL_AFIO_REMAP_TIM16_DISABLE() CLEAR_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM16_REMAP) 686 #if defined(AFIO_MAPR2_TIM17_REMAP) 693 #define __HAL_AFIO_REMAP_TIM17_ENABLE() SET_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM17_REMAP) 700 #define __HAL_AFIO_REMAP_TIM17_DISABLE() CLEAR_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM17_REMAP) 703 #if defined(AFIO_MAPR2_CEC_REMAP) 710 #define __HAL_AFIO_REMAP_CEC_ENABLE() SET_BIT(AFIO->MAPR2, AFIO_MAPR2_CEC_REMAP) 717 #define __HAL_AFIO_REMAP_CEC_DISABLE() CLEAR_BIT(AFIO->MAPR2, AFIO_MAPR2_CEC_REMAP) 720 #if defined(AFIO_MAPR2_TIM1_DMA_REMAP) 727 #define __HAL_AFIO_REMAP_TIM1DMA_ENABLE() SET_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM1_DMA_REMAP) 734 #define __HAL_AFIO_REMAP_TIM1DMA_DISABLE() CLEAR_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM1_DMA_REMAP) 737 #if defined(AFIO_MAPR2_TIM67_DAC_DMA_REMAP) 744 #define __HAL_AFIO_REMAP_TIM67DACDMA_ENABLE() SET_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM67_DAC_DMA_REMAP) 751 #define __HAL_AFIO_REMAP_TIM67DACDMA_DISABLE() CLEAR_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM67_DAC_DMA_REMAP) 754 #if defined(AFIO_MAPR2_TIM12_REMAP) 762 #define __HAL_AFIO_REMAP_TIM12_ENABLE() SET_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM12_REMAP) 770 #define __HAL_AFIO_REMAP_TIM12_DISABLE() CLEAR_BIT(AFIO->MAPR2, AFIO_MAPR2_TIM12_REMAP) 773 #if defined(AFIO_MAPR2_MISC_REMAP) 785 #define __HAL_AFIO_REMAP_MISC_ENABLE() SET_BIT(AFIO->MAPR2, AFIO_MAPR2_MISC_REMAP) 797 #define __HAL_AFIO_REMAP_MISC_DISABLE() CLEAR_BIT(AFIO->MAPR2, AFIO_MAPR2_MISC_REMAP) 811 #if defined(STM32F101x6) || defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6) 812 #define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0uL :\ 813 ((__GPIOx__) == (GPIOB))? 1uL :\ 814 ((__GPIOx__) == (GPIOC))? 2uL :3uL) 815 #elif defined(STM32F100xB) || defined(STM32F101xB) || defined(STM32F103xB) || defined(STM32F105xC) || defined(STM32F107xC) 816 #define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0uL :\ 817 ((__GPIOx__) == (GPIOB))? 1uL :\ 818 ((__GPIOx__) == (GPIOC))? 2uL :\ 819 ((__GPIOx__) == (GPIOD))? 3uL :4uL) 820 #elif defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) 821 #define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0uL :\ 822 ((__GPIOx__) == (GPIOB))? 1uL :\ 823 ((__GPIOx__) == (GPIOC))? 2uL :\ 824 ((__GPIOx__) == (GPIOD))? 3uL :\ 825 ((__GPIOx__) == (GPIOE))? 4uL :\ 826 ((__GPIOx__) == (GPIOF))? 5uL :6uL) 829 #define AFIO_REMAP_ENABLE(REMAP_PIN) do{ uint32_t tmpreg = AFIO->MAPR; \ 830 tmpreg |= AFIO_MAPR_SWJ_CFG; \ 831 tmpreg |= REMAP_PIN; \ 832 AFIO->MAPR = tmpreg; \ 835 #define AFIO_REMAP_DISABLE(REMAP_PIN) do{ uint32_t tmpreg = AFIO->MAPR; \ 836 tmpreg |= AFIO_MAPR_SWJ_CFG; \ 837 tmpreg &= ~REMAP_PIN; \ 838 AFIO->MAPR = tmpreg; \ 841 #define AFIO_REMAP_PARTIAL(REMAP_PIN, REMAP_PIN_MASK) do{ uint32_t tmpreg = AFIO->MAPR; \ 842 tmpreg &= ~REMAP_PIN_MASK; \ 843 tmpreg |= AFIO_MAPR_SWJ_CFG; \ 844 tmpreg |= REMAP_PIN; \ 845 AFIO->MAPR = tmpreg; \ 848 #define AFIO_DBGAFR_CONFIG(DBGAFR_SWJCFG) do{ uint32_t tmpreg = AFIO->MAPR; \ 849 tmpreg &= ~AFIO_MAPR_SWJ_CFG_Msk; \ 850 tmpreg |= DBGAFR_SWJCFG; \ 851 AFIO->MAPR = tmpreg; \ 868 void HAL_GPIOEx_ConfigEventout(uint32_t GPIO_PortSource, uint32_t GPIO_PinSource);
869 void HAL_GPIOEx_EnableEventout(
void);
870 void HAL_GPIOEx_DisableEventout(
void);
This file contains HAL common defines, enumeration, macros and structures definitions.