edge_detect Entity Reference

Edge detect entity. More...

Inheritance diagram for edge_detect:

Entities
rtl	architecture
	Architecture rtl of edge_detect entity. More...

Libraries
ieee
	Using IEEE library.

Use Clauses
std_logic_1164
	Using IEEE standard logic components.

Ports
clk_in	in std_logic
	Clock.
rst_in	in std_logic
	Asynchronous reset.
sig_in	in std_logic
	Input signal.
rise_out	out std_logic
	Rising edge output.
fall_out	out std_logic
	Falling edge output.

Detailed Description

Edge detect entity.

This edge detect entity takes a signal input and detects rising or falling edges.

Definition at line 16 of file edge_detect.vhd.

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The documentation for this class was generated from the following file:

• fpga/common/utility/source/edge_detect.vhd