Architecture tb of pwm_tb entity. More...

Processes
pr_clock	( )
	Clock generation process.
pr_stimulus	( )
	Stimulus process to drive PWM unit under test.

Constants
c_clk_period	time := 10 ns
	Test bench clock period.
c_stimulus	t_stimulus_array := ( ( name = > " Hold in reset " , rst = > ' 1 ' , adv = > ' 0 ' , duty = > B " 00 " , percent = > 0 ) , ( name = > " Freeze " , rst = > ' 0 ' , adv = > ' 0 ' , duty = > B " 11 " , percent = > 0 ) , ( name = > " Running period 3 " , rst = > ' 0 ' , adv = > ' 1 ' , duty = > B " 11 " , percent = > 100 ) , ( name = > " Running period 2 " , rst = > ' 0 ' , adv = > ' 1 ' , duty = > B " 10 " , percent = > 67 ) , ( name = > " Running period 1 " , rst = > ' 0 ' , adv = > ' 1 ' , duty = > B " 01 " , percent = > 33 ) , ( name = > " Running period 0 " , rst = > ' 0 ' , adv = > ' 1 ' , duty = > B " 00 " , percent = > 0 ) )
	Test stimulus.

Types
t_stimulus_array	array ( natural range <> ) of t_stimulus
	Stimulus array type.

Signals
clk	std_logic
	Clock input to pwm uut.
pwm	std_logic
	PWM output from pwm uut.
on_rst	std_logic
	Reset input to on_percent.
on_percent	integer
	Percent output from on_percent.

Instantiations
i_uut	pwm <Entity pwm>
	Instantiate PWM as uut.
i_on_percent	sim_on_percent <Entity sim_on_percent>
	Instantiate on_percent.

Detailed Description

Architecture tb of pwm_tb entity.

Definition at line 20 of file pwm_tb.vhd.

Member Data Documentation

Package

adv input to uut

PWM advance input to pwm uut.

Definition at line 29 of file pwm_tb.vhd.

Package

duty input to uut

Duty-cycle input to pwm uut.

Definition at line 30 of file pwm_tb.vhd.

Package

rst input to uut

Reset input to pwm uut.

Definition at line 28 of file pwm_tb.vhd.

The documentation for this class was generated from the following file: