rtl Architecture Reference

Architecture rtl of sdm entity. More...

Processes
pr_sdm	( clk_in , rst_in )
	Process for sigma-delta generation.

Signals
accumulator	unsigned ( sdm_level_in ' HIGH+ 1 DOWNTO 0 )
	Modulator accumulator.

Detailed Description

Architecture rtl of sdm entity.

Definition at line 32 of file sdm.vhd.

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The documentation for this class was generated from the following file:

• fpga/common/utility/source/sdm.vhd