Verilog Parser: verilog_timescale_directive Struct Reference

Verilog Parser

Describes a simulation timescale directive. More...

#include <verilog_preprocessor.h>

Data Fields
char *	precision
	Precision of each timestep.

char *	scale
	The timescale to simulate on.

Detailed Description

Describes a simulation timescale directive.

The documentation for this struct was generated from the following file:

src/verilog_preprocessor.h

verilog_timescale_directive
Generated on Sat Aug 6 2016 11:14:06 for Verilog Parser by 1.8.11