Verilog Parser
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Describes a single reg declaration. More...
#include <verilog_ast.h>
Data Fields | |
ast_identifier | identifier |
What is the reg called? | |
ast_boolean | is_signed |
ast_metadata | meta |
Node metadata. | |
ast_range * | range |
Width of the reg. | |
ast_expression * | value |
Default assigned value. | |
Describes a single reg declaration.