Verilog Parser
Data Fields
ast_switch_gate Struct Reference
Abstract Syntax Tree » AST Construction Functions » Primitives

Describes a single gate type along with it's delay properties. More...

#include <verilog_ast.h>

Data Fields

union {
   ast_delay2 *   delay2
 IFF type == TRAN or RTRAN.
 
   ast_delay3 *   delay3
 
}; 
 
ast_metadata meta
 Node metadata.
 
ast_switchtype type
 

Detailed Description

Describes a single gate type along with it's delay properties.

The documentation for this struct was generated from the following file: