TPI_Type Struct Reference

Structure type to access the Trace Port Interface Register (TPI). More...

#include <core_armv8mbl.h>

Public Attributes
__IM uint32_t	SSPSR
__IOM uint32_t	CSPSR
uint32_t	RESERVED0 [2U]
__IOM uint32_t	ACPR
uint32_t	RESERVED1 [55U]
__IOM uint32_t	SPPR
uint32_t	RESERVED2 [131U]
__IM uint32_t	FFSR
__IOM uint32_t	FFCR
__IOM uint32_t	PSCR
uint32_t	RESERVED3 [809U]
__OM uint32_t	LAR
__IM uint32_t	LSR
uint32_t	RESERVED4 [4U]
__IM uint32_t	TYPE
__IM uint32_t	DEVTYPE
__IM uint32_t	TRIGGER
__IM uint32_t	ITFTTD0
__IOM uint32_t	ITATBCTR2
__IM uint32_t	ITATBCTR0
__IM uint32_t	ITFTTD1
__IOM uint32_t	ITCTRL
uint32_t	RESERVED5 [39U]
__IOM uint32_t	CLAIMSET
__IOM uint32_t	CLAIMCLR
uint32_t	RESERVED7 [8U]
__IM uint32_t	DEVID
__IM uint32_t	FSCR
__IM uint32_t	FIFO0
__IM uint32_t	ITATBCTR2
__IM uint32_t	FIFO1

Detailed Description

Structure type to access the Trace Port Interface Register (TPI).

Member Data Documentation

ACPR

__IOM uint32_t TPI_Type::ACPR

Offset: 0x010 (R/W) Asynchronous Clock Prescaler Register

CLAIMCLR

__IOM uint32_t TPI_Type::CLAIMCLR

Offset: 0xFA4 (R/W) Claim tag clear

CLAIMSET

__IOM uint32_t TPI_Type::CLAIMSET

Offset: 0xFA0 (R/W) Claim tag set

CSPSR

__IOM uint32_t TPI_Type::CSPSR

Offset: 0x004 (R/W) Current Parallel Port Sizes Register

Offset: 0x004 (R/W) Current Parallel Port Size Register

DEVID

__IM uint32_t TPI_Type::DEVID

Offset: 0xFC8 (R/ ) Device Configuration Register

Offset: 0xFC8 (R/ ) TPIU_DEVID

DEVTYPE

__IM uint32_t TPI_Type::DEVTYPE

Offset: 0xFCC (R/ ) Device Type Register

Offset: 0xFCC (R/ ) Device Type Identifier Register

Offset: 0xFCC (R/ ) TPIU_DEVTYPE

FFCR

__IOM uint32_t TPI_Type::FFCR

Offset: 0x304 (R/W) Formatter and Flush Control Register

FFSR

__IM uint32_t TPI_Type::FFSR

Offset: 0x300 (R/ ) Formatter and Flush Status Register

FIFO0

__IM uint32_t TPI_Type::FIFO0

Offset: 0xEEC (R/ ) Integration ETM Data

FIFO1

__IM uint32_t TPI_Type::FIFO1

Offset: 0xEFC (R/ ) Integration ITM Data

FSCR

__IM uint32_t TPI_Type::FSCR

Offset: 0x308 (R/ ) Formatter Synchronization Counter Register

ITATBCTR0

__IM uint32_t TPI_Type::ITATBCTR0

Offset: 0xEF8 (R/ ) Integration Test ATB Control Register 0

Offset: 0xEF8 (R/ ) ITATBCTR0

ITATBCTR2 [1/2]

__IM uint32_t TPI_Type::ITATBCTR2

Offset: 0xEF0 (R/W) Integration Test ATB Control Register 2

Offset: 0xEF0 (R/ ) ITATBCTR2

ITATBCTR2 [2/2]

__IM uint32_t TPI_Type::ITATBCTR2

Offset: 0xEF0 (R/ ) ITATBCTR2

ITCTRL

__IOM uint32_t TPI_Type::ITCTRL

Offset: 0xF00 (R/W) Integration Mode Control

ITFTTD0

__IM uint32_t TPI_Type::ITFTTD0

Offset: 0xEEC (R/ ) Integration Test FIFO Test Data 0 Register

ITFTTD1

__IM uint32_t TPI_Type::ITFTTD1

Offset: 0xEFC (R/ ) Integration Test FIFO Test Data 1 Register

LAR

__OM uint32_t TPI_Type::LAR

Offset: 0xFB0 ( /W) Software Lock Access Register

LSR

__IM uint32_t TPI_Type::LSR

Offset: 0xFB4 (R/ ) Software Lock Status Register

PSCR

__IOM uint32_t TPI_Type::PSCR

Offset: 0x308 (R/W) Periodic Synchronization Control Register

SPPR

__IOM uint32_t TPI_Type::SPPR

Offset: 0x0F0 (R/W) Selected Pin Protocol Register

SSPSR

__IM uint32_t TPI_Type::SSPSR

Offset: 0x000 (R/ ) Supported Parallel Port Sizes Register

Offset: 0x000 (R/ ) Supported Parallel Port Size Register

TRIGGER

__IM uint32_t TPI_Type::TRIGGER

Offset: 0xEE8 (R/ ) TRIGGER Register

TYPE

__IM uint32_t TPI_Type::TYPE

Offset: 0xFC8 (R/ ) Device Identifier Register

---

The documentation for this struct was generated from the following files:

• test/STM32TestProject/Drivers/CMSIS/Include/core_armv8mbl.h
• test/STM32TestProject/Drivers/CMSIS/Include/core_armv8mml.h
• test/STM32TestProject/Drivers/CMSIS/Include/core_cm23.h
• test/STM32TestProject/Drivers/CMSIS/Include/core_cm3.h
• test/STM32TestProject/Drivers/CMSIS/Include/core_cm33.h
• test/STM32TestProject/Drivers/CMSIS/Include/core_cm4.h
• test/STM32TestProject/Drivers/CMSIS/Include/core_cm7.h
• test/STM32TestProject/Drivers/CMSIS/Include/core_sc300.h