5 #ifndef ARUNA_ADS101X_H 6 #define ARUNA_ADS101X_H 76 W_NO_EFFECT = 0b0 << 15,
77 W_START_A_SINGLE_CONVERSION = 0b1 << 15,
78 R_DEVICE_IS_CURRENTLY_PERFORMING_A_CONVERSION = 0b0 << 15,
79 R_DEVICE_IS_NOT_CURRENTLY_PERFORMING_A_CONVERSION = 0b1 << 15,
89 FSR_6144mV = 0b000 << 9,
90 FSR_4096mV = 0b001 << 9,
91 FSR_2048mV = 0b010 << 9,
92 FSR_1024mV = 0b011 << 9,
93 FSR_0512mV = 0b100 << 9,
94 FSR_0256mV = 0b101 << 9,
103 CONTINUOUS_CONVERSION = 0b0 << 8,
104 SINGLE_SHOT = 0b1 << 8,
113 SPS_128 = 0b000 << 5,
114 SPS_250 = 0b001 << 5,
115 SPS_490 = 0b010 << 5,
116 SPS_920 = 0b011 << 5,
117 SPS_1600 = 0b100 << 5,
118 SPS_2400 = 0b101 << 5,
119 SPS_3300 = 0b110 << 5,
128 TRADITIONAL = 0b0 << 4,
138 ACTIVE_LOW = 0b0 << 3,
139 ACTIVE_HIGH = 0b1 << 3,
150 NONLATCHING_COMPARATOR = 0b0 << 2,
151 LATCHING_COMPARATOR = 0b1 << 2,
165 ASSERT_AFTER_ONE_CONVERSION = 0b00,
166 ASSERT_AFTER_TWO_CONVERSIONS = 0b01,
167 ASSERT_AFTER_FOUR_CONVERSION = 0b10,
168 DISABLE_COMPARATOR_AND_SET_ALERT_RDY_PIN_TO_HIGH_IMPEDANCE = 0b11,
183 #endif //ARUNA_ADS101X_H
uint8_t static const default_address
OS
Operational status or single-shot conversion start This bit determines the operational status of the ...
COMP_MODE
Comparator mode (ADS1014 and ADS1015 only) This bit configures the comparator operating mode...
COMP_LAT
Latching comparator (ADS1014 and ADS1015 only) This bit controls whether the ALERT/RDY pin latches af...
ADS101x(MUX compare, I2C_master *i2c_bus, uint8_t address=default_address)
ADS101x I²C 12 bit ADC with four channels.
MUX
Input multiplexer configuration (ADS1015 only) These bits configure the input multiplexer.
uint8_t const i2c_address
err_t isConnected(uint8_t address)
check if device is connected and functional
register_address_pointer
Pointer to the registers.
Link * driver
stores the driver.
Analogue digital converter.
err_t _read(int32_t &raw) override
Read analogue value and convert to 32bit signed resolution.
COMP_QUEUE
Comparator queue and disable (ADS1014 and ADS1015 only) These bits perform two functions.
MODE
Device operating mode This bit controls the operating mode.
reset_value
write these values to the respected registers to reset them to their default value.
DR
Data rate These bits control the data rate setting.
PGA
Programmable gain amplifier configuration These bits set the FSR of the programmable gain amplifier...
COMP_POL
Comparator polarity (ADS1014 and ADS1015 only) This bit controls the polarity of the ALERT/RDY pin...