Aruna
ADS101x.h
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1 //
2 // Created by noeel on 17-08-20.
3 //
4 
5 #ifndef ARUNA_ADS101X_H
6 #define ARUNA_ADS101X_H
7 
8 #include "aruna/driver/ADC.h"
10 
11 namespace aruna {
12  namespace driver {
13  class ADS101x : public ADC {
14  public:
19  enum class MUX {
20  DEFAULT = 0b000 << 12,
21  AINp0_AINn1 = 0b000 << 12,
22  AINp0_AINn3 = 0b001 << 12,
23  AINp1_AINn3 = 0b010 << 12,
24  AINp2_AINn3 = 0b011 << 12,
25  AINp0_AINnGND = 0b100 << 12,
26  AINp1_AINnGND = 0b101 << 12,
27  AINp2_AINnGND = 0b110 << 12,
28  AINp3_AINnGND = 0b111 << 12,
29  };
30 
36  err_t isConnected(uint8_t address);
37 
44  ADS101x(MUX compare, I2C_master *i2c_bus, uint8_t address = default_address);
45 
46  private:
47 
48  uint8_t const static default_address = 0b1001000;
49 
54  CONVERSION = 0b00,
55  CONFIG = 0b01,
56  LO_TRESH = 0b10,
57  HI_TRESH = 0b11,
58  };
59 
63  enum class reset_value {
64  CONVERSION = 0x0000,
65  CONFIG = 0x8583,
66  LO_THRESH = 0x8000,
67  HI_THRESH = 0x7FFF,
68  };
69 
75  enum class OS {
76  W_NO_EFFECT = 0b0 << 15,
77  W_START_A_SINGLE_CONVERSION = 0b1 << 15,
78  R_DEVICE_IS_CURRENTLY_PERFORMING_A_CONVERSION = 0b0 << 15,
79  R_DEVICE_IS_NOT_CURRENTLY_PERFORMING_A_CONVERSION = 0b1 << 15,
80  };
81 
82 
87  enum class PGA {
88  DEFAULT = 0b010 << 9,
89  FSR_6144mV = 0b000 << 9,
90  FSR_4096mV = 0b001 << 9,
91  FSR_2048mV = 0b010 << 9,
92  FSR_1024mV = 0b011 << 9,
93  FSR_0512mV = 0b100 << 9,
94  FSR_0256mV = 0b101 << 9,
95  };
96 
101  enum class MODE {
102  DEFAULT = 0b1 << 8,
103  CONTINUOUS_CONVERSION = 0b0 << 8,
104  SINGLE_SHOT = 0b1 << 8,
105  };
106 
111  enum class DR {
112  DEFAULT = 0b100 << 5,
113  SPS_128 = 0b000 << 5,
114  SPS_250 = 0b001 << 5,
115  SPS_490 = 0b010 << 5,
116  SPS_920 = 0b011 << 5,
117  SPS_1600 = 0b100 << 5,
118  SPS_2400 = 0b101 << 5,
119  SPS_3300 = 0b110 << 5,
120  };
121 
126  enum class COMP_MODE {
127  DEFAULT = 0b0 << 4,
128  TRADITIONAL = 0b0 << 4,
129  WINDOW = 0b1 << 4,
130  };
131 
136  enum class COMP_POL {
137  DEFAULT = 0b0 << 3,
138  ACTIVE_LOW = 0b0 << 3,
139  ACTIVE_HIGH = 0b1 << 3,
140  };
141 
148  enum class COMP_LAT {
149  DEFAULT = 0b0 << 2,
150  NONLATCHING_COMPARATOR = 0b0 << 2,
151  LATCHING_COMPARATOR = 0b1 << 2,
152  };
153 
163  enum class COMP_QUEUE {
164  DEFAULT = 0b11,
165  ASSERT_AFTER_ONE_CONVERSION = 0b00,
166  ASSERT_AFTER_TWO_CONVERSIONS = 0b01,
167  ASSERT_AFTER_FOUR_CONVERSION = 0b10,
168  DISABLE_COMPARATOR_AND_SET_ALERT_RDY_PIN_TO_HIGH_IMPEDANCE = 0b11,
169  };
170 
171  const MUX compare;
173  uint8_t const i2c_address;
174 
175  err_t _read(int32_t &raw) override;
176 
177 
178  };
179  }
180 }
181 
182 
183 #endif //ARUNA_ADS101X_H
Definition: comm.cpp:14
uint8_t static const default_address
Definition: ADS101x.h:48
OS
Operational status or single-shot conversion start This bit determines the operational status of the ...
Definition: ADS101x.h:75
COMP_MODE
Comparator mode (ADS1014 and ADS1015 only) This bit configures the comparator operating mode...
Definition: ADS101x.h:126
COMP_LAT
Latching comparator (ADS1014 and ADS1015 only) This bit controls whether the ALERT/RDY pin latches af...
Definition: ADS101x.h:148
ADS101x(MUX compare, I2C_master *i2c_bus, uint8_t address=default_address)
ADS101x I²C 12 bit ADC with four channels.
Definition: ADS101x.cpp:53
MUX
Input multiplexer configuration (ADS1015 only) These bits configure the input multiplexer.
Definition: ADS101x.h:19
uint8_t const i2c_address
Definition: ADS101x.h:173
err_t isConnected(uint8_t address)
check if device is connected and functional
register_address_pointer
Pointer to the registers.
Definition: ADS101x.h:53
Link * driver
stores the driver.
Definition: comm.cpp:45
Analogue digital converter.
Definition: ADC.h:19
err_t _read(int32_t &raw) override
Read analogue value and convert to 32bit signed resolution.
Definition: ADS101x.cpp:12
I2C_master * i2c_bus
Definition: ADS101x.h:172
COMP_QUEUE
Comparator queue and disable (ADS1014 and ADS1015 only) These bits perform two functions.
Definition: ADS101x.h:163
MODE
Device operating mode This bit controls the operating mode.
Definition: ADS101x.h:101
reset_value
write these values to the respected registers to reset them to their default value.
Definition: ADS101x.h:63
DR
Data rate These bits control the data rate setting.
Definition: ADS101x.h:111
PGA
Programmable gain amplifier configuration These bits set the FSR of the programmable gain amplifier...
Definition: ADS101x.h:87
COMP_POL
Comparator polarity (ADS1014 and ADS1015 only) This bit controls the polarity of the ALERT/RDY pin...
Definition: ADS101x.h:136