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enum | register_address_pointer { register_address_pointer::CONVERSION = 0b00,
register_address_pointer::CONFIG = 0b01,
register_address_pointer::LO_TRESH = 0b10,
register_address_pointer::HI_TRESH = 0b11
} |
| Pointer to the registers. More...
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enum | reset_value { reset_value::CONVERSION = 0x0000,
reset_value::CONFIG = 0x8583,
reset_value::LO_THRESH = 0x8000,
reset_value::HI_THRESH = 0x7FFF
} |
| write these values to the respected registers to reset them to their default value. More...
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enum | OS { OS::W_NO_EFFECT = 0b0 << 15,
OS::W_START_A_SINGLE_CONVERSION = 0b1 << 15,
OS::R_DEVICE_IS_CURRENTLY_PERFORMING_A_CONVERSION = 0b0 << 15,
OS::R_DEVICE_IS_NOT_CURRENTLY_PERFORMING_A_CONVERSION = 0b1 << 15
} |
| Operational status or single-shot conversion start This bit determines the operational status of the device. More...
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enum | PGA {
PGA::DEFAULT = 0b010 << 9,
PGA::FSR_6144mV = 0b000 << 9,
PGA::FSR_4096mV = 0b001 << 9,
PGA::FSR_2048mV = 0b010 << 9,
PGA::FSR_1024mV = 0b011 << 9,
PGA::FSR_0512mV = 0b100 << 9,
PGA::FSR_0256mV = 0b101 << 9
} |
| Programmable gain amplifier configuration These bits set the FSR of the programmable gain amplifier. More...
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enum | MODE { MODE::DEFAULT = 0b1 << 8,
MODE::CONTINUOUS_CONVERSION = 0b0 << 8,
MODE::SINGLE_SHOT = 0b1 << 8
} |
| Device operating mode This bit controls the operating mode. More...
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enum | DR {
DR::DEFAULT = 0b100 << 5,
DR::SPS_128 = 0b000 << 5,
DR::SPS_250 = 0b001 << 5,
DR::SPS_490 = 0b010 << 5,
DR::SPS_920 = 0b011 << 5,
DR::SPS_1600 = 0b100 << 5,
DR::SPS_2400 = 0b101 << 5,
DR::SPS_3300 = 0b110 << 5
} |
| Data rate These bits control the data rate setting. More...
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enum | COMP_MODE { COMP_MODE::DEFAULT = 0b0 << 4,
COMP_MODE::TRADITIONAL = 0b0 << 4,
COMP_MODE::WINDOW = 0b1 << 4
} |
| Comparator mode (ADS1014 and ADS1015 only) This bit configures the comparator operating mode. More...
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enum | COMP_POL { COMP_POL::DEFAULT = 0b0 << 3,
COMP_POL::ACTIVE_LOW = 0b0 << 3,
COMP_POL::ACTIVE_HIGH = 0b1 << 3
} |
| Comparator polarity (ADS1014 and ADS1015 only) This bit controls the polarity of the ALERT/RDY pin. More...
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enum | COMP_LAT { COMP_LAT::DEFAULT = 0b0 << 2,
COMP_LAT::NONLATCHING_COMPARATOR = 0b0 << 2,
COMP_LAT::LATCHING_COMPARATOR = 0b1 << 2
} |
| Latching comparator (ADS1014 and ADS1015 only) This bit controls whether the ALERT/RDY pin latches after being asserted or clears after conversions are within the margin of the upper and lower threshold values. More...
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enum | COMP_QUEUE {
COMP_QUEUE::DEFAULT = 0b11,
COMP_QUEUE::ASSERT_AFTER_ONE_CONVERSION = 0b00,
COMP_QUEUE::ASSERT_AFTER_TWO_CONVERSIONS = 0b01,
COMP_QUEUE::ASSERT_AFTER_FOUR_CONVERSION = 0b10,
COMP_QUEUE::DISABLE_COMPARATOR_AND_SET_ALERT_RDY_PIN_TO_HIGH_IMPEDANCE = 0b11
} |
| Comparator queue and disable (ADS1014 and ADS1015 only) These bits perform two functions. More...
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Definition at line 13 of file ADS101x.h.
Comparator queue and disable (ADS1014 and ADS1015 only) These bits perform two functions.
When set to 11, the comparator is disabled and the ALERT/RDY pin is set to a high-impedance state. When set to any other value, the ALERT/RDY pin and the comparator function are enabled, and the set value determines the number of successive conversions exceeding the upper or lower threshold required before asserting the ALERT/RDY pin. These bits serve no function on the ADS1013.
Enumerator |
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DEFAULT | |
ASSERT_AFTER_ONE_CONVERSION | |
ASSERT_AFTER_TWO_CONVERSIONS | |
ASSERT_AFTER_FOUR_CONVERSION | |
DISABLE_COMPARATOR_AND_SET_ALERT_RDY_PIN_TO_HIGH_IMPEDANCE | |
Definition at line 163 of file ADS101x.h.
165 ASSERT_AFTER_ONE_CONVERSION = 0b00,
166 ASSERT_AFTER_TWO_CONVERSIONS = 0b01,
167 ASSERT_AFTER_FOUR_CONVERSION = 0b10,
168 DISABLE_COMPARATOR_AND_SET_ALERT_RDY_PIN_TO_HIGH_IMPEDANCE = 0b11,