Verilog Parser

Describes a single exeuctable item in a case statement. More...

#include <verilog_ast.h>

Data Fields

ast_statement * body
 What to execute if the condition is met.
 
ast_listconditions
 A list of condtions, one must be met.
 
ast_boolean is_default
 This is the default item.
 
ast_metadata meta
 Node metadata.
 

Detailed Description

Describes a single exeuctable item in a case statement.


The documentation for this struct was generated from the following file: