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Verilog Parser
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Describes a single net declaration. More...
#include <verilog_ast.h>
Data Fields | |
| ast_delay3 * | delay |
| Delay characteristics. | |
| ast_drive_strength * | drive |
| Drive strength. | |
| ast_identifier | identifier |
| What is the net called? | |
| ast_boolean | is_signed |
| ast_metadata | meta |
| Node metadata. | |
| ast_range * | range |
| Width of the net. | |
| ast_boolean | scalared |
| ast_net_type | type |
| What sort of net is this? | |
| ast_expression * | value |
| Default assigned value. | |
| ast_boolean | vectored |
Describes a single net declaration.