Verilog Parser

encodes a single assignment. More...

#include <verilog_ast.h>

Data Fields

ast_delay3 * delay
 Signal propagation delay.
 
ast_drive_strength * drive_strength
 Drive strength of the assignment.
 
ast_expression * expression
 The value it takes on.
 
ast_lvaluelval
 The thing being assigned to.
 
ast_metadata meta
 Node metadata.
 

Detailed Description

encodes a single assignment.

A single lvalue=expression assignment.


The documentation for this struct was generated from the following file: