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Verilog Parser
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Fully describes a single block of statements. More...
#include <verilog_ast.h>
Data Fields | |
| ast_identifier | block_identifier |
| ast_list * | declarations |
| ast_metadata | meta |
| Node metadata. | |
| ast_list * | statements |
| ast_timing_control_statement * | trigger |
| ast_block_type | type |
Fully describes a single block of statements.
this is used to represent begin...end constructs, always, initial blocks, and collections of statements in the body of a function or task.