Verilog Parser
|
Data Fields | |
ast_port_direction | direction |
Input or output to the port. | |
ast_list * | identifiers |
The list of port names. | |
ast_boolean | is_signed |
Does it represent a signed value? | |
ast_metadata | meta |
Node metadata. | |
ast_range * | range |
Bit or item range for arrays. | |
ast_boolean | reg |
Is is a registered value? | |
ast_task_port_type | type |
Data type (if any) | |