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Verilog Parser
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Fully describes the declaration of elements one might find inside a module. More...
#include <verilog_ast.h>
Data Fields | |
| ast_charge_strength | charge_strength |
| ast_delay3 * | delay |
| ast_drive_strength * | drive_strength |
| ast_list * | identifiers |
| ast_boolean | is_signed |
| ast_metadata | meta |
| Node metadata. | |
| ast_net_type | net_type |
| ast_range * | range |
| ast_boolean | scalared |
| ast_declaration_type | type |
| ast_boolean | vectored |
Fully describes the declaration of elements one might find inside a module.