Verilog Parser
Data Fields
ast_module_instantiation Struct Reference
Abstract Syntax Tree » AST Construction Functions » Module Declaration » Module Items » Module Instantiation

Describes the instantiation of one or more modules of the same type with the same parameters. More...

#include <verilog_ast.h>

Data Fields

union {
   ast_module_declaration *   declaration
 The module instanced.
 
   ast_identifier   module_identifer
 The module being instanced.
 
}; 
 
ast_metadata meta
 Node metadata.
 
ast_list * module_instances
 
ast_list * module_parameters
 
ast_boolean resolved
 Is the name resolved to a declaration?
 

Detailed Description

Describes the instantiation of one or more modules of the same type with the same parameters.

If the resolved member is true, then you can access the declaration member, and find out everything about the module being instanced. Otherwise, you must access the module_identifier member, and can only know what the module is called.

The documentation for this struct was generated from the following file: