Firmware
icm20948.h
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33 
34 #include <stdint.h>
35 
36 #include <perf/perf_counter.h>
37 #include <systemlib/conversions.h>
38 
39 #include <nuttx/wqueue.h>
40 
41 #include <board_config.h>
42 #include <drivers/drv_hrt.h>
43 
46 #include <drivers/drv_accel.h>
47 #include <drivers/drv_gyro.h>
48 #include <drivers/drv_mag.h>
49 #include <mathlib/math/filter/LowPassFilter2p.hpp>
51 #include <systemlib/err.h>
52 
53 #include <uORB/uORB.h>
54 #include <uORB/topics/debug_key_value.h>
55 
56 #include "mag.h"
57 #include "accel.h"
58 #include "gyro.h"
59 
60 
61 #if defined(PX4_I2C_OBDEV_MPU9250) || defined(PX4_I2C_BUS_EXPANSION)
62 # define USE_I2C
63 #endif
64 
65 
66 // MPU 9250 registers
67 #define MPUREG_WHOAMI 0x75
68 #define MPUREG_SMPLRT_DIV 0x19
69 #define MPUREG_CONFIG 0x1A
70 #define MPUREG_GYRO_CONFIG 0x1B
71 #define MPUREG_ACCEL_CONFIG 0x1C
72 #define MPUREG_ACCEL_CONFIG2 0x1D
73 #define MPUREG_LPACCEL_ODR 0x1E
74 #define MPUREG_WOM_THRESH 0x1F
75 #define MPUREG_FIFO_EN 0x23
76 #define MPUREG_I2C_MST_CTRL 0x24
77 #define MPUREG_I2C_SLV0_ADDR 0x25
78 #define MPUREG_I2C_SLV0_REG 0x26
79 #define MPUREG_I2C_SLV0_CTRL 0x27
80 #define MPUREG_I2C_SLV1_ADDR 0x28
81 #define MPUREG_I2C_SLV1_REG 0x29
82 #define MPUREG_I2C_SLV1_CTRL 0x2A
83 #define MPUREG_I2C_SLV2_ADDR 0x2B
84 #define MPUREG_I2C_SLV2_REG 0x2C
85 #define MPUREG_I2C_SLV2_CTRL 0x2D
86 #define MPUREG_I2C_SLV3_ADDR 0x2E
87 #define MPUREG_I2C_SLV3_REG 0x2F
88 #define MPUREG_I2C_SLV3_CTRL 0x30
89 #define MPUREG_I2C_SLV4_ADDR 0x31
90 #define MPUREG_I2C_SLV4_REG 0x32
91 #define MPUREG_I2C_SLV4_DO 0x33
92 #define MPUREG_I2C_SLV4_CTRL 0x34
93 #define MPUREG_I2C_SLV4_DI 0x35
94 #define MPUREG_I2C_MST_STATUS 0x36
95 #define MPUREG_INT_PIN_CFG 0x37
96 #define MPUREG_INT_ENABLE 0x38
97 #define MPUREG_INT_STATUS 0x3A
98 #define MPUREG_ACCEL_XOUT_H 0x3B
99 #define MPUREG_ACCEL_XOUT_L 0x3C
100 #define MPUREG_ACCEL_YOUT_H 0x3D
101 #define MPUREG_ACCEL_YOUT_L 0x3E
102 #define MPUREG_ACCEL_ZOUT_H 0x3F
103 #define MPUREG_ACCEL_ZOUT_L 0x40
104 #define MPUREG_TEMP_OUT_H 0x41
105 #define MPUREG_TEMP_OUT_L 0x42
106 #define MPUREG_GYRO_XOUT_H 0x43
107 #define MPUREG_GYRO_XOUT_L 0x44
108 #define MPUREG_GYRO_YOUT_H 0x45
109 #define MPUREG_GYRO_YOUT_L 0x46
110 #define MPUREG_GYRO_ZOUT_H 0x47
111 #define MPUREG_GYRO_ZOUT_L 0x48
112 #define MPUREG_EXT_SENS_DATA_00 0x49
113 #define MPUREG_I2C_SLV0_D0 0x63
114 #define MPUREG_I2C_SLV1_D0 0x64
115 #define MPUREG_I2C_SLV2_D0 0x65
116 #define MPUREG_I2C_SLV3_D0 0x66
117 #define MPUREG_I2C_MST_DELAY_CTRL 0x67
118 #define MPUREG_SIGNAL_PATH_RESET 0x68
119 #define MPUREG_MOT_DETECT_CTRL 0x69
120 #define MPUREG_USER_CTRL 0x6A
121 #define MPUREG_PWR_MGMT_1 0x6B
122 #define MPUREG_PWR_MGMT_2 0x6C
123 #define MPUREG_FIFO_COUNTH 0x72
124 #define MPUREG_FIFO_COUNTL 0x73
125 #define MPUREG_FIFO_R_W 0x74
126 
127 // Configuration bits MPU 9250
128 #define BIT_SLEEP 0x40
129 #define BIT_H_RESET 0x80
130 #define MPU_CLK_SEL_AUTO 0x01
131 
132 #define BITS_GYRO_ST_X 0x80
133 #define BITS_GYRO_ST_Y 0x40
134 #define BITS_GYRO_ST_Z 0x20
135 #define BITS_FS_250DPS 0x00
136 #define BITS_FS_500DPS 0x08
137 #define BITS_FS_1000DPS 0x10
138 #define BITS_FS_2000DPS 0x18
139 #define BITS_FS_MASK 0x18
140 
141 #define BITS_DLPF_CFG_250HZ 0x00
142 #define BITS_DLPF_CFG_184HZ 0x01
143 #define BITS_DLPF_CFG_92HZ 0x02
144 #define BITS_DLPF_CFG_41HZ 0x03
145 #define BITS_DLPF_CFG_20HZ 0x04
146 #define BITS_DLPF_CFG_10HZ 0x05
147 #define BITS_DLPF_CFG_5HZ 0x06
148 #define BITS_DLPF_CFG_3600HZ 0x07
149 #define BITS_DLPF_CFG_MASK 0x07
150 
151 #define BITS_ACCEL_CONFIG2_41HZ 0x03
152 
153 #define BIT_RAW_RDY_EN 0x01
154 #define BIT_INT_ANYRD_2CLEAR 0x10
155 #define BIT_INT_BYPASS_EN 0x02
156 
157 #define BIT_I2C_READ_FLAG 0x80
158 
159 #define BIT_I2C_SLV0_NACK 0x01
160 #define BIT_I2C_FIFO_EN 0x40
161 #define BIT_I2C_MST_EN 0x20
162 #define BIT_I2C_IF_DIS 0x10
163 #define BIT_FIFO_RST 0x04
164 #define BIT_I2C_MST_RST 0x02
165 #define BIT_SIG_COND_RST 0x01
166 
167 #define BIT_I2C_SLV0_EN 0x80
168 #define BIT_I2C_SLV0_BYTE_SW 0x40
169 #define BIT_I2C_SLV0_REG_DIS 0x20
170 #define BIT_I2C_SLV0_REG_GRP 0x10
171 
172 #define BIT_I2C_MST_MULT_MST_EN 0x80
173 #define BIT_I2C_MST_WAIT_FOR_ES 0x40
174 #define BIT_I2C_MST_SLV_3_FIFO_EN 0x20
175 #define BIT_I2C_MST_P_NSR 0x10
176 #define BITS_I2C_MST_CLOCK_258HZ 0x08
177 #define BITS_I2C_MST_CLOCK_400HZ 0x0D
178 
179 #define BIT_I2C_SLV0_DLY_EN 0x01
180 #define BIT_I2C_SLV1_DLY_EN 0x02
181 #define BIT_I2C_SLV2_DLY_EN 0x04
182 #define BIT_I2C_SLV3_DLY_EN 0x08
183 
184 #define ICM_WHOAMI_20948 0xEA
185 
186 #define MPU9250_ACCEL_DEFAULT_RATE 1000
187 #define MPU9250_ACCEL_MAX_OUTPUT_RATE 280
188 #define MPU9250_ACCEL_DEFAULT_DRIVER_FILTER_FREQ 30
189 #define MPU9250_GYRO_DEFAULT_RATE 1000
190 /* rates need to be the same between accel and gyro */
191 #define MPU9250_GYRO_MAX_OUTPUT_RATE MPU9250_ACCEL_MAX_OUTPUT_RATE
192 #define MPU9250_GYRO_DEFAULT_DRIVER_FILTER_FREQ 30
193 
194 #define MPU9250_DEFAULT_ONCHIP_FILTER_FREQ 92
195 
196 #define MPUIOCGIS_I2C (unsigned)(DEVIOCGDEVICEID+100)
197 
198 
199 
200 // ICM20948 registers and data
201 
202 /*
203  * ICM20948 I2C address LSB can be switched by the chip's AD0 pin, thus is device dependent.
204  * Noting this down for now. Here GPS uses 0x69. To support a device implementing the second
205  * address, probably an additional MPU_DEVICE_TYPE is the way to go.
206  */
207 #define PX4_I2C_EXT_ICM20948_0 0x68
208 #define PX4_I2C_EXT_ICM20948_1 0x69
209 
210 /*
211  * ICM20948 uses register banks. Register 127 (0x7F) is used to switch between 4 banks.
212  * There's room in the upper address byte below the port speed setting to code in the
213  * used bank. This is a bit more efficient, already in use for the speed setting and more
214  * in one place than a solution with a lookup table for address/bank pairs.
215  */
216 
217 #define BANK0 0x0000
218 #define BANK1 0x0100
219 #define BANK2 0x0200
220 #define BANK3 0x0300
221 
222 #define BANK_REG_MASK 0x0300
223 #define REG_BANK(r) (((r) & BANK_REG_MASK)>>4)
224 #define REG_ADDRESS(r) ((r) & ~BANK_REG_MASK)
225 
226 #define ICMREG_20948_BANK_SEL 0x7F
227 
228 #define ICMREG_20948_WHOAMI (0x00 | BANK0)
229 #define ICMREG_20948_USER_CTRL (0x03 | BANK0)
230 #define ICMREG_20948_PWR_MGMT_1 (0x06 | BANK0)
231 #define ICMREG_20948_PWR_MGMT_2 (0x07 | BANK0)
232 #define ICMREG_20948_INT_PIN_CFG (0x0F | BANK0)
233 #define ICMREG_20948_INT_ENABLE (0x10 | BANK0)
234 #define ICMREG_20948_INT_ENABLE_1 (0x11 | BANK0)
235 #define ICMREG_20948_ACCEL_XOUT_H (0x2D | BANK0)
236 #define ICMREG_20948_INT_ENABLE_2 (0x12 | BANK0)
237 #define ICMREG_20948_INT_ENABLE_3 (0x13 | BANK0)
238 #define ICMREG_20948_EXT_SLV_SENS_DATA_00 (0x3B | BANK0)
239 #define ICMREG_20948_GYRO_SMPLRT_DIV (0x00 | BANK2)
240 #define ICMREG_20948_GYRO_CONFIG_1 (0x01 | BANK2)
241 #define ICMREG_20948_GYRO_CONFIG_2 (0x02 | BANK2)
242 #define ICMREG_20948_ACCEL_SMPLRT_DIV_1 (0x10 | BANK2)
243 #define ICMREG_20948_ACCEL_SMPLRT_DIV_2 (0x11 | BANK2)
244 #define ICMREG_20948_ACCEL_CONFIG (0x14 | BANK2)
245 #define ICMREG_20948_ACCEL_CONFIG_2 (0x15 | BANK2)
246 #define ICMREG_20948_I2C_MST_CTRL (0x01 | BANK3)
247 #define ICMREG_20948_I2C_SLV0_ADDR (0x03 | BANK3)
248 #define ICMREG_20948_I2C_SLV0_REG (0x04 | BANK3)
249 #define ICMREG_20948_I2C_SLV0_CTRL (0x05 | BANK3)
250 #define ICMREG_20948_I2C_SLV0_DO (0x06 | BANK3)
251 
252 
253 
254 /*
255 * ICM20948 register bits
256 * Most of the regiser set values from MPU9250 have the same
257 * meaning on ICM20948. The exceptions and values not already
258 * defined for MPU9250 are defined below
259 */
260 #define ICM_BIT_PWR_MGMT_1_ENABLE 0x00
261 #define ICM_BIT_USER_CTRL_I2C_MST_DISABLE 0x00
262 
263 #define ICM_BITS_GYRO_DLPF_CFG_197HZ 0x01
264 #define ICM_BITS_GYRO_DLPF_CFG_151HZ 0x09
265 #define ICM_BITS_GYRO_DLPF_CFG_119HZ 0x11
266 #define ICM_BITS_GYRO_DLPF_CFG_51HZ 0x19
267 #define ICM_BITS_GYRO_DLPF_CFG_23HZ 0x21
268 #define ICM_BITS_GYRO_DLPF_CFG_11HZ 0x29
269 #define ICM_BITS_GYRO_DLPF_CFG_5HZ 0x31
270 #define ICM_BITS_GYRO_DLPF_CFG_361HZ 0x39
271 #define ICM_BITS_GYRO_DLPF_CFG_MASK 0x39
272 
273 #define ICM_BITS_GYRO_FS_SEL_250DPS 0x00
274 #define ICM_BITS_GYRO_FS_SEL_500DPS 0x02
275 #define ICM_BITS_GYRO_FS_SEL_1000DPS 0x04
276 #define ICM_BITS_GYRO_FS_SEL_2000DPS 0x06
277 #define ICM_BITS_GYRO_FS_SEL_MASK 0x06
278 
279 #define ICM_BITS_ACCEL_DLPF_CFG_246HZ 0x09
280 #define ICM_BITS_ACCEL_DLPF_CFG_111HZ 0x11
281 #define ICM_BITS_ACCEL_DLPF_CFG_50HZ 0x19
282 #define ICM_BITS_ACCEL_DLPF_CFG_23HZ 0x21
283 #define ICM_BITS_ACCEL_DLPF_CFG_11HZ 0x29
284 #define ICM_BITS_ACCEL_DLPF_CFG_5HZ 0x31
285 #define ICM_BITS_ACCEL_DLPF_CFG_473HZ 0x39
286 #define ICM_BITS_ACCEL_DLPF_CFG_MASK 0x39
287 
288 #define ICM_BITS_ACCEL_FS_SEL_250DPS 0x00
289 #define ICM_BITS_ACCEL_FS_SEL_500DPS 0x02
290 #define ICM_BITS_ACCEL_FS_SEL_1000DPS 0x04
291 #define ICM_BITS_ACCEL_FS_SEL_2000DPS 0x06
292 #define ICM_BITS_ACCEL_FS_SEL_MASK 0x06
293 
294 #define ICM_BITS_DEC3_CFG_4 0x00
295 #define ICM_BITS_DEC3_CFG_8 0x01
296 #define ICM_BITS_DEC3_CFG_16 0x10
297 #define ICM_BITS_DEC3_CFG_32 0x11
298 #define ICM_BITS_DEC3_CFG_MASK 0x11
299 
300 #define ICM_BITS_I2C_MST_CLOCK_370KHZ 0x00
301 #define ICM_BITS_I2C_MST_CLOCK_400HZ 0x07 // recommended by datasheet for 400kHz target clock
302 
303 
304 
305 #define MPU_OR_ICM(m,i) ((_whoami==ICM_WHOAMI_20948) ? i : m)
306 
307 
308 #pragma pack(push, 1)
309 
313 struct ICMReport {
314  uint8_t accel_x[2];
315  uint8_t accel_y[2];
316  uint8_t accel_z[2];
317  uint8_t gyro_x[2];
318  uint8_t gyro_y[2];
319  uint8_t gyro_z[2];
320  uint8_t temp[2];
321  struct ak8963_regs mag;
322 };
323 #pragma pack(pop)
324 
325 
326 
327 
328 #pragma pack(push, 1)
329 
333 struct MPUReport {
334  uint8_t cmd;
335  uint8_t status;
336  uint8_t accel_x[2];
337  uint8_t accel_y[2];
338  uint8_t accel_z[2];
339  uint8_t temp[2];
340  uint8_t gyro_x[2];
341  uint8_t gyro_y[2];
342  uint8_t gyro_z[2];
343  struct ak8963_regs mag;
344 };
345 #pragma pack(pop)
346 
347 #define MPU_MAX_WRITE_BUFFER_SIZE (2)
348 
349 
350 /*
351  The MPU9250 can only handle high bus speeds on the sensor and
352  interrupt status registers. All other registers have a maximum 1MHz
353  Communication with all registers of the device is performed using either
354  I2C at 400kHz or SPI at 1MHz. For applications requiring faster communications,
355  the sensor and interrupt registers may be read using SPI at 20MHz
356  */
357 #define MPU9250_LOW_BUS_SPEED 0
358 #define MPU9250_HIGH_BUS_SPEED 0x8000
359 #define MPU9250_REG_MASK 0x00FF
360 # define MPU9250_IS_HIGH_SPEED(r) ((r) & MPU9250_HIGH_BUS_SPEED)
361 # define MPU9250_REG(r) ((r) & MPU9250_REG_MASK)
362 # define MPU9250_SET_SPEED(r, s) ((r)|(s))
363 # define MPU9250_HIGH_SPEED_OP(r) MPU9250_SET_SPEED((r), MPU9250_HIGH_BUS_SPEED)
364 # define MPU9250_LOW_SPEED_OP(r) ((r) &~MPU9250_HIGH_BUS_SPEED)
365 
366 /* interface factories */
367 extern device::Device *ICM20948_SPI_interface(int bus, uint32_t cs, bool external_bus);
368 extern device::Device *ICM20948_I2C_interface(int bus, uint32_t address, bool external_bus);
369 extern int MPU9250_probe(device::Device *dev);
370 
371 typedef device::Device *(*ICM20948_constructor)(int, uint32_t, bool);
372 
373 class ICM20948_mag;
374 class ICM20948_accel;
375 class ICM20948_gyro;
376 
377 class ICM20948
378 {
379 public:
380  ICM20948(device::Device *interface, device::Device *mag_interface, const char *path_accel, const char *path_gyro,
381  const char *path_mag,
382  enum Rotation rotation,
383  bool magnetometer_only);
384 
385  virtual ~ICM20948();
386 
387  virtual int init();
388  uint8_t get_whoami();
389 
393  void print_info();
394 
395 protected:
396  device::Device *_interface;
397  uint8_t _whoami;
399  virtual int probe();
400 
401  friend class ICM20948_accel;
402  friend class ICM20948_mag;
403  friend class ICM20948_gyro;
404 
405 private:
406  ICM20948_accel *_accel;
407  ICM20948_gyro *_gyro;
408  ICM20948_mag *_mag;
409  uint8_t _selected_bank; /* Remember selected memory bank to avoid polling / setting on each read/write */
410  bool
411  _magnetometer_only; /* To disable accel and gyro reporting if only magnetometer is used (e.g. as external magnetometer) */
412 
413 #if defined(USE_I2C)
414  /*
415  * SPI bus based device use hrt
416  * I2C bus needs to use work queue
417  */
418  work_s _work{};
419 #endif
420  bool _use_hrt;
421 
422  struct hrt_call _call {};
423  unsigned _call_interval;
424 
425  ringbuffer::RingBuffer *_accel_reports;
426 
427  struct accel_calibration_s _accel_scale;
428  float _accel_range_scale;
429  float _accel_range_m_s2;
430  orb_advert_t _accel_topic;
431 
432  ringbuffer::RingBuffer *_gyro_reports;
433 
434  struct gyro_calibration_s _gyro_scale;
435  float _gyro_range_scale;
436  float _gyro_range_rad_s;
437 
438  unsigned _dlpf_freq;
439  unsigned _dlpf_freq_icm_gyro;
440  unsigned _dlpf_freq_icm_accel;
441 
442  unsigned _sample_rate;
443  perf_counter_t _accel_reads;
444  perf_counter_t _gyro_reads;
445  perf_counter_t _sample_perf;
446  perf_counter_t _bad_transfers;
447  perf_counter_t _bad_registers;
448  perf_counter_t _good_transfers;
449  perf_counter_t _reset_retries;
450  perf_counter_t _duplicates;
451 
452  uint8_t _register_wait;
453  uint64_t _reset_wait;
454 
455  math::LowPassFilter2p _accel_filter_x;
456  math::LowPassFilter2p _accel_filter_y;
457  math::LowPassFilter2p _accel_filter_z;
458  math::LowPassFilter2p _gyro_filter_x;
459  math::LowPassFilter2p _gyro_filter_y;
460  math::LowPassFilter2p _gyro_filter_z;
461 
462  Integrator _accel_int;
463  Integrator _gyro_int;
464 
465  enum Rotation _rotation;
466 
467  // this is used to support runtime checking of key
468  // configuration registers to detect SPI bus errors and sensor
469  // reset
470 
471 #ifndef MAX
472 #define MAX(X,Y) ((X) > (Y) ? (X) : (Y))
473 #endif
474 
475  static constexpr int ICM20948_NUM_CHECKED_REGISTERS{15};
476  static const uint16_t _icm20948_checked_registers[ICM20948_NUM_CHECKED_REGISTERS];
477 
478  const uint16_t *_checked_registers;
479 
480  uint8_t _checked_values[ICM20948_NUM_CHECKED_REGISTERS];
481  uint8_t _checked_bad[ICM20948_NUM_CHECKED_REGISTERS];
482  unsigned _checked_next;
483  unsigned _num_checked_registers;
484 
485 
486  // last temperature reading for print_info()
487  float _last_temperature;
488 
489  bool check_null_data(uint16_t *data, uint8_t size);
490  bool check_duplicate(uint8_t *accel_data);
491  // keep last accel reading for duplicate detection
492  uint8_t _last_accel_data[6];
493  bool _got_duplicate;
494 
498  void start();
499 
503  void stop();
504 
510  int reset();
511 
512 
516  int reset_mpu();
517 
518 
519 #if defined(USE_I2C)
520 
534  void cycle();
535 
542  static void cycle_trampoline(void *arg);
543 
544  void use_i2c(bool on_true) { _use_hrt = !on_true; }
545 
546 #endif
547 
548  bool is_i2c(void) { return !_use_hrt; }
549 
550 
551 
552 
562  static void measure_trampoline(void *arg);
563 
567  void measure();
568 
578  int select_register_bank(uint8_t bank);
579 
580 
588  uint8_t read_reg(unsigned reg, uint32_t speed = MPU9250_LOW_BUS_SPEED);
589  uint16_t read_reg16(unsigned reg);
590 
591 
601  uint8_t read_reg_range(unsigned start_reg, uint32_t speed, uint8_t *buf, uint16_t count);
602 
609  void write_reg(unsigned reg, uint8_t value);
610 
620  void modify_reg(unsigned reg, uint8_t clearbits, uint8_t setbits);
621 
628  void write_checked_reg(unsigned reg, uint8_t value);
629 
639  void modify_checked_reg(unsigned reg, uint8_t clearbits, uint8_t setbits);
640 
647  int set_accel_range(unsigned max_g);
648 
652  uint16_t swap16(uint16_t val) { return (val >> 8) | (val << 8); }
653 
659  bool is_external() { return _interface->external(); }
660 
661  /*
662  set low pass filter frequency
663  */
664  void _set_dlpf_filter(uint16_t frequency_hz);
665 
666  /*
667  set sample rate (approximate) - 1kHz to 5Hz
668  */
669  void _set_sample_rate(unsigned desired_sample_rate_hz);
670 
671  /*
672  set poll rate
673  */
674  int _set_pollrate(unsigned long rate);
675 
676  /*
677  check that key registers still have the right value
678  */
679  void check_registers(void);
680 
681  /* do not allow to copy this class due to pointer data members */
682  ICM20948(const ICM20948 &);
683  ICM20948 operator=(const ICM20948 &);
684 };
A flexible ringbuffer class.
Accelerometer driver interface.
Gyroscope driver interface.
Definition: mag.h:103
gyro scaling factors; Vout = (Vin * Vscale) + Voffset
Definition: drv_gyro.h:54
__BEGIN_DECLS typedef void * orb_advert_t
ORB topic advertiser handle.
Definition: uORB.h:134
Helper class implementing the accel driver node.
Definition: accel.h:41
Helper class implementing the magnetometer driver node.
Definition: mag.h:132
Vector rotation library.
High-resolution timer with callouts and timekeeping.
accel scaling factors; Vout = Vscale * (Vin + Voffset)
Definition: drv_accel.h:54
Definition: integrator.h:48
Report conversation within the mpu, including command byte and interrupt status.
Definition: icm20948.h:333
Header common to all counters.
Definition: perf_counter.cpp:65
Definition of commonly used conversions.
Definition: icm20948.h:377
void reset(enum BMP280_BUS busid)
Reset the driver.
Definition: bmp280.cpp:743
Rotation
Enum for board and external compass rotations.
Definition: rotation.h:51
Fundamental base class for all physical drivers (I2C, SPI).
Definition: Device.hpp:65
API for the uORB lightweight object broker.
Report conversation within the mpu, including command byte and interrupt status.
Definition: icm20948.h:313
Simple error/warning functions, heavily inspired by the BSD functions of the same names...
Helper class implementing the gyro driver node.
Definition: gyro.h:41
A resettable integrator.
Callout record.
Definition: drv_hrt.h:72
Definition: LowPassFilter2p.hpp:43
Performance measuring tools.