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Verilog Parser
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Verilog Parser
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Describes a single module item, its type and data structure. More...
#include <verilog_ast.h>
Data Fields | |
| union { | |
| ast_statement * always_construct | |
| ast_continuous_assignment * continuous_assignment | |
| ast_type_declaration * event_declaration | |
| ast_function_declaration * function_declaration | |
| ast_gate_instantiation * gate_instantiation | |
| ast_generate_block * generated_instantiation | |
| ast_type_declaration * genvar_declaration | |
| ast_statement * initial_construct | |
| ast_type_declaration * integer_declaration | |
| ast_module_instantiation * module_instantiation | |
| ast_type_declaration * net_declaration | |
| ast_parameter_declarations * parameter_declaration | |
| ast_list * parameter_override | |
| ast_port_declaration * port_declaration | |
| ast_type_declaration * real_declaration | |
| ast_type_declaration * realtime_declaration | |
| ast_type_declaration * reg_declaration | |
| ast_list * specify_block | |
| ast_parameter_declarations * specparam_declaration | |
| ast_task_declaration * task_declaration | |
| ast_type_declaration * time_declaration | |
| ast_udp_instantiation * udp_instantiation | |
| }; | |
| ast_node_attributes * | attributes |
| ast_metadata | meta |
| Node metadata. | |
| ast_module_item_type | type |
Describes a single module item, its type and data structure.
An item within a module. Duh.
1.8.11 
